Signal Integrity Engineer KUMDC

Job Title:
Signal Integrity Engineer/ Design engineer

Duration: 12 months (There is potential for this to extend or convert to FTE based on performance, budget and ongoing need)

Schedule:
Hybrid
- Mon, Wed, and Thursday/ Tues and Friday- remote

Job Summary:

• We are seeking a Signal Integrity Engineer to support the development and qualification of high-performance SSD products for enterprise, storage, and compute applications. The engineer will be responsible for SI analysis, design guidance, simulation, validation, and correlation between predicted and measured product performance.
• Perform pre-layout and post-layout SI simulations for high-speed interfaces, including PCIe, DDR, and NAND.
• Define PCB, package, connector, routing, and stack-up design guidelines.
• Review schematics and layouts and identify SI risks early in the design cycle.
• Analyze channel margins, eye diagrams, jitter, crosstalk, reflections, and impedance discontinuities.
• Collaborate with Layout, Hardware, Systems, Package, Validation, and Product Characterization teams.
• Support lab measurements, EVT activities, debugging, and root-cause analysis.
• Correlate simulation results with laboratory and product-training data.
• Plan and execute DOEs to understand simulation-to-measurement gaps.
• Work with component and equipment vendors to evaluate technical solutions.
• Document methodologies, findings, guidelines, and product-level SI results

Skills:

• 5+ years of experience in signal integrity, high-speed digital design, or a related engineering field.
• Knowledge of transmission lines, impedance, S-parameters, jitter, crosstalk, and channel analysis.
• Experience with SI simulation tools such as Ansys HFSS, SIwave, ADS, or Cadence Sigrity.
• Familiarity with laboratory equipment such as oscilloscopes, VNAs, and TDRs.
• Strong analytical, debugging, communication, and cross-functional collaboration skills.

Education:

• B.Sc. or M.Sc. in Electrical Engineering or a related field.