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Senior or Principal SerDes Design Engineer

Job in Jacksonville, Duval County, Florida, 32290, USA
Listing for: Celero Communications, Inc.
Full Time position
Listed on 2026-07-17
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Hardware Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 150000 - 250000 USD Yearly USD 150000.00 250000.00 YEAR
Job Description & How to Apply Below

Senior or Principal Ser Des Design Engineer

Location:

San Jose, CA;
Irvine, CA (onsite options).

Overview

Senior to Principal Ser Des Design Engineer roles focusing on high-speed interconnect technology. Opportunity to architect and design Ser Des for next-generation transceivers and deliver disruptive solutions to power AI workloads.

What You Will Do
  • Define architecture, specifications, and circuit topologies for next-generation Ser Des
  • Develop system-level models and behavioral models (e.g., MATLAB, System Verilog, Verilog-A) to analyze link budgets, equalization strategies, and jitter budgeting
  • Design high-performance analog/mixed-signal circuits in advanced node technologies
  • Develop and oversee the design of critical blocks including RX/TX equalization (CTLE, DFE), high-speed PLLs, phase interpolators, DLLs, and TDCs
  • Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve Power, Performance, and Area
  • Oversee physical layout to minimize parasitics, device stress, electromigration, and process variation impacts
  • Analyze Signal Integrity and Power Integrity to achieve system-defined targets
  • Lead lab validation, debugging, and characterization of Ser Des IPs in a state-of-the-art lab
  • Correlate silicon measurements with simulations and drive performance optimization in the system environment
What You Will Bring
  • Master’s degree and/or PhD in Electrical Engineering or related field with 10+ years of Ser Des design experience
  • Proven track record of taking high-speed Ser Des designs to tape-out and volume production
  • Experience in lab bring-up, characterization, and debugging designs for production
  • Extensive experience with advanced node technologies (16nm/12nm, 7nm, 5nm, 3nm, 2nm)
  • Cross-functional collaboration experience to deliver IP and ensure seamless SOC integration
  • Strong communication and documentation skills
Annual Base Salary Range

$150,000 - $250,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.)

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Position Requirements
10+ Years work experience
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