ML Engineer, Model Training - Senior Member of Technical Staff (SMTS

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AMD is building a hardware-assisted security platform that uses silicon-level Performance Monitoring Counters (PMCs) and on-chip machine learning to detect advanced endpoint threats (ransomware, fileless malware, cryptojacking) at the processor layer, below OS-based evasion. The platform collects CPU behavioral telemetry, classifies it via an ML inference engine, and exposes threat signals to security-software partners through a standardized API. The team covers the full stack: silicon telemetry, ML training/validation, real-time inference, lab qualification and CI/C

• Define and lead the ML model roadmap, progressing from binary malware/benign classification through multi-class threat taxonomy to behavioral attack-pattern detection. Architect training pipelines that scale to a growing malware variant library with reproducible, versioned experiments; establish model quality gates for production promotion.
• Lead research into advanced detection techniques including behavioral sequence modeling and detection of novel, previously unseen threat categories.
• Optimize multi-class ML classifiers for NPU inference against throughput and latency requirements; collaborate with hardware teams on NPU capability requirements.
• Drive dataset strategy including coverage across threat categories, synthetic data generation and dataset quality standards.
• Mentor MTS ML engineers; lead model and code reviews; establish best practices for reproducibility, documentation and experimental rigor. Represent ML model strategy in architecture reviews, external partner technical meetings and potential research publications.

• 7+ years of applied ML experience, including 3+ years in security, anomaly detection or hardware/systems ML.
• Expert-level proficiency in PyTorch or Tensor Flow; strong Python; experience leading ML platform or infrastructure decisions. Demonstrated record of taking ML models from research to production deployment.
• Experience with model deployment on GPU, NPU or other specialized hardware accelerators.
• Ability to lead technical direction and influence cross-functional teams.

• Research or industry experience in hardware‑assisted security, side‑channel analysis or microarchitectural security.
• Familiarity with AMD compute tool chains or AMD NPU inference frameworks.
• Knowledge of attack classification frameworks and enterprise threat hunting methodologies.
• Experience collaborating with endpoint security software.