Staff Software Engineer, ML Systems Co-Design

Staff Software Engineer, ML Systems Co-Design

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile;

the list goes on and is growing every day.

As a software engineer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. With your technical expertise you will manage project priorities, deadlines, and deliverables.

You will design, develop, test, deploy, maintain, and enhance software solutions.

The MARC (Model Architecture and Realizable-performance Co-design) team is Google's proactive, ahead-of-silicon co-design engine. We operate at the critical intersection of frontier ML workloads and multi-year TPU silicon roadmaps. Given rapid 6-month model breakthroughs and complex Compound AI Systems, our mandate is to focus on the 12+ month time window between Hardware Architecture Freeze and Physical Silicon Pilot. In this role, you will define and own the strategy for enabling open-source ML models to achieve TPU performance with internal models  will establish a principled, scalable methodology to analyze mapping gaps across open-source model families.

Responsibilities:

• Deliver certified performance ladders 6 months pre-pilot as the canonical goals for pricing, capacity planning, and XLA/kernel optimization.
• Adapt emerging open-source models into TPU-native twin variants (Max Twin, sparsity) to prove asymmetric TPU superiority.
• Ingest and optimize multi-turn agentic workflows, reasoning loops, and prompt/decode disaggregated topologies ahead of silicon.
• Author high-signal reference implementations (PyTorch/JAX/Pallas) that guarantee reachability of pre-pilot goals under real-world compiler constraints.
• Partner with L7–L9 leaders across TPU Hardware, XLA Compiler, and Cloud AI Systems to steer multi-year roadmaps.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $207000 - $300000 (USD) + 20% bonus target + equity + benefits.