Process Engineering Manager - Lithograpthy, Metrology, Test & Yield

Position Summary:

The Process Engineering Manager - Litho, Metrology, Test and Yield leads a team of process engineers and technical contributors responsible for wafer fabrication process development, sustaining, yield improvement, process control, and technology transfer activities across assigned modules. This role provides senior technical and people leadership across photolithography, metrology, inspection, test interface, yield analysis, data-driven process improvement, and related module integration in a cleanroom manufacturing environment.

Primary Scope:
Lithography, photoresist processing, align / expose / develop, overlay and critical dimension control, metrology, inspection, test interface, yield analysis, process control, sustaining, development, qualification, and transfer.

People Leadership Expectations:

Serve as the direct people leader for an engineering team, with accountability for team performance, engagement, development, and execution against business priorities.
Set clear goals, priorities, and expectations for individual contributors; ensure employees understand how their work supports fab, customer, program, and business objectives.
Provide regular coaching, feedback, recognition, and career development support for employees at varying levels of experience.
Build technical depth across the team by creating development plans, supporting knowledge sharing, strengthening process ownership, and delegating meaningful technical ownership.
Assess team capability, identify skill gaps, and partner with leadership, HR, and Talent Acquisition on workforce planning, hiring, onboarding, retention, and succession planning.
Create a culture of accountability, collaboration, safety, technical rigor, continuous improvement, and respectful communication.
Conduct performance management activities including goal setting, check-ins, development discussions, performance feedback, and corrective action when needed.
Develop future leaders by creating stretch assignments, mentoring high-potential employees, and building a bench of capable process owners.

Major Area of Accountablity:

Lead process development, optimization, qualification, and sustaining activities for lithography, metrology, inspection, test interface, yield analysis, and associated process control systems.
Provide senior-level technical direction for photoresist processing, lithographic patterning, overlay, critical dimension control, metrology strategy, inspection methods, yield monitoring, and module-level integration interactions.
Drive process capability, yield improvement, defect reduction, overlay performance, critical dimension control, measurement quality, data integrity, excursion response, and cost-of-ownership initiatives.
Lead root-cause investigations and corrective actions for yield limiters, defectivity excursions, metrology gaps, test / yield signals, tool matching issues, process drift, and reliability risks.
Apply DOE, SPC, process window analysis, statistical methods, process capability analysis, and yield data analysis to improve process robustness and manufacturability.
Partner with integration, device, product, equipment, quality, operations, reliability, test, data systems, and program teams to resolve complex technical issues and meet customer commitments.
Guide new technology development, process transfer, process release, measurement strategy, control plan definition, and qualification activities across CMOS, MEMS, photonics, photovoltaic, or heterogeneous integration platforms.
Establish and monitor key process metrics including yield, defects, overlay, CD control, metrology correlation, tool matching, process capability, test / yield indicators, documentation health, and excursion response.
Ensure compliance with safety, quality, documentation, change-control, customer, and cleanroom operating requirements.
Communicate status, risks, recovery plans, resource needs, and execution priorities clearly to senior leadership and cross-functional stakeholders.

Required Qualifications

Education

B.S., M.S., or Ph.D. degree in Mechanical Engineering, Electrical Engineering, Chemical Engineering, Materials Science, Physics, or another relevant engineering discipline.

Experience and/or Training

Minimum of 15 years of experience in a wafer fabrication cleanroom environment.
Minimum of 2 years of leadership, supervisory, or management experience, preferably with direct people leadership responsibility.
Experience as a process or area owner for at least two relevant process areas such as lithography, photoresist processing, metrology, inspection, test interface, yield analysis, process control, or related module processes.
Experience working in CMOS, MEMS, photonics, photovoltaic, or heterogeneous integration / advanced packaging fabrication environments.
Demonstrated experience leading structured problem-solving efforts using 8D, 3D, Fishbone, 5 Why, fault-tree analysis, or similar methodologies.
Strong working knowledge of DOE, SPC, process capability…