Digital Design Engineer; MPU

Brain Chip is seeking a Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team members to design and develop digital modules from concept stage to tape-out or FPGA release. This position will be part of our Hardware Development group. The Digital Design Engineer needs to be able to start from a Product Requirement Specification, develop a feasible microarchitecture, implement the function using RTL language, verify the functionality, and follow up until completion of the product.

This is a hybrid role requiring you in our Laguna Hills, CA office 3x a week.

Additional Requirement:

Candidates must have experience in embedded MPU design, preferably with RISC-V architectures and custom accelerators. This includes developing and integrating processor cores, designing instruction sets, and optimizing performance for AI workloads. Familiarity with pipeline design, cache systems, and hardware/software co-design is highly desirable.

• Understand product requirements, gather the relevant information, and develop a solution.
• Specify and implement CPUs such as RISC-V in a co-processor or host role.
• Use RTL language to design the digital functional modules.
• Program, debug, and build the FPGA for system verification.
• Use simulation tools to check the functionalities of the designs in RTL and gate level.
• Collaborate with other team members to define a verification methodology and a test plan
• Write clear documentation of the designs.

To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The requirements listed below are representative of the knowledge, skill, and ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

• BS/MS in Electrical Engineering or related degree or certification required
• 3+ years of experience in digital logic design
• Good understanding of modern computational architectures
• Experience in embedded MPU design, preferably RISC-V
• Fluent in Verilog and System Verilog
• Knowledge of MPU and SRAM based SoC components and system busses (AXI, AHB, APB) is strongly desired
• Knowledge of standard SoC interfaces (SPI, I2C, etc.…) and high-speed IO protocols (PCIe, USB, DDR) is a plus
• Good skills in Python and shell scripting are desired
• Good debugging skills, and well experienced with VCS/Verdi or similar toolsets

At Brain Chip, we hire based on potential, performance, and alignment with our mission to shape the future of intelligent edge computing. We are committed to providing a fair and respectful workplace where individuals are evaluated on their qualifications and contributions. Employment decisions are made without regard to race, color, religion, sex, national origin, age, disability, or any other status protected by applicable law.

We value the diverse perspectives and experiences that help drive innovation in neuromorphic AI and welcome applicants from all backgrounds who share our passion for advancing technology that matters.