Circuit Design Engineer

Circuit Design Engineer

Clearance Level: Must have an Active Secret Clearance to be considered for this opportunity due to the nature of the work. Must be US Citizen

Location: This role is 100% remote - must be willing to travel up to 3 times a year.

At Aquila Technology, you will see our team’s passion every day, whether we are building a robust, policy-compliant IT system or stress-testing a system to identify gaps and security vulnerabilities. To own the advantage, we ensure our team owns results and gets the work done right the first time by deploying smart, purposeful solutions that work. Aquila is the right people with the right skills driving the right outcomes.

We call this the Aquila Advantage.

Aquila Technology is seeking a Circuit Design Engineer to support one of the nation’s premier defense research organizations. The team develops custom digital & mixed-signal Readout Integrated Circuits (ROICs) for advanced imager applications. An analog/mixed-signal layout design engineer is needed for implementation of imager circuit building blocks.

• Clearance Level: Currently holds a Secret Clearance (OR a higher clearance)
• 10 years
  - Cadence IC design flow with layout, DRC, LVS, and parasitic extraction using Calibre and Assura
• 10 years
  - Experience in top level floor planning as well as block level design
• 10 years
  - Experience with multiple design tape outs
• 10 years
  - Deep-submicron CMOS Layout (12nm - 22nm, Global Foundries)
• 10 years
  - Presentation, verbal and written communication skills
• 10 years
  - Strong team communication
• 10 years
  - Strong Verbal and Written Communication

• Physical layout and verification of integrated circuit building blocks
• Full-chip assembly and top-level verification.
• Use best-practices for managing local process variation through layout techniques as well as high-speed digital and RF layout techniques to minimize unwanted parasitic interactions.

• Experience in deep-submicron CMOS layout across technologies including 12-65 nm design nodes in multiple foundries such as Global Foundries, onsemi and Tower Jazz
• Cadence integrated circuit design flow including layout, DRC, LVS and parasitic extraction through the use of Calibre and Assura.
• Proven track record of multiple design tape outs
• Extensive experience in top level floor planning as well as block level design
• Strong interpersonal and organizational skills along with strong written/verbal skills are required to support a multi-person design team in an effective way.

Aquila team members experience the opportunity to be part of a fast-paced, customer-focused, and technically innovative work environment. Aquila strives to deliver the best of the best in technical services to our customers. Candidates that possess a love for technical challenges, a desire to constantly learn, and the desire to establish themselves as critical players within a team will enjoy calling Aquila Technology home.

PTO - 15 days (vacation/sick) 10 paid holidays - 6 standard (New Year's, Memorial Day, Independence Day, Labor Day, Thanksgiving, and Christmas) - 4 floating holidays prorated based on your day of hire:

• 1.5 paid days, or 12 hours, for approved volunteer work
• 1 week of paid maternity/paternity LOA after 1 year of Full-time employment

Tuition & Training Reimbursement- 5K annually for pre-approved, Eligible full-time team members who have completed a minimum ofsix (6) months of employment may apply for tuition reimbursement for approved, job-related courses taken through an accredited college or university. Team members must achieve a grade of "B" or better to qualify for reimbursement. Aquila will reimburse up to $5,000 per fiscal year for…