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Senior FPGA Design Engineer — DSP & Multi-Clock Systems

Job in Los Angeles, Los Angeles County, California, 90079, USA
Listing for: Edison Smart®
Full Time position
Listed on 2026-06-13
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

Edison Smart® is seeking a Senior FPGA Design Engineer to contribute to the development of next-generation communication products. This position involves working through all stages from architecture to deployment, ensuring high-quality performance in complex design scenarios.

The ideal candidate will have over 6 years of FPGA design experience and strong skills in Xilinx FPGAs and Vivado, with a focus on DSP and multi-clock domain designs. Join a talented team and tackle real-world communication challenges!

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Position Requirements
10+ Years work experience
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