Senior Embedded Firmware Engineer -Power Satellites

K2 is building the largest and highest‑power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and U.S. government customers – we’re mass‑producing the highest‑power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy‑lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches planned through 2026 and 2027, we’re Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast‑paced environment and you’re excited about contributing to the success of a groundbreaking Series C space startup, we’d love for you to apply.

We are seeking a Senior Embedded Firmware Engineer to develop and enhance low‑level embedded firmware for high‑performance mixed‑signal and digital SoCs. In this role you will contribute to the bring‑up, validation, and production readiness of custom silicon by working closely with digital ASIC, mixed‑signal, RF, verification, and system engineering teams. You will help implement core firmware components, validate hardware functionality, and ensure reliable, scalable firmware foundations for next‑generation products.

• Contribute to the design and implementation of embedded firmware architecture, including boot flows, HAL components, drivers, and system services.
• Develop low‑level firmware in C/C++ (and assembly when required) for CPUs, DSPs, and microcontrollers within custom SoCs.
• Implement and maintain bootloaders, secure boot flows, and early hardware initialization sequences.
• Develop device drivers for on‑chip peripherals such as DMA engines, memory controllers, interconnects, Ser Des, ADC/DAC interfaces, timers, and GPIO.
• Participate in pre‑silicon firmware development and validation activities.
• Support post‑silicon bring‑up, including power‑on sequencing, clock/reset initialization, memory bring‑up, and peripheral testing.
• Debug hardware/firmware interactions using JTAG, logic analyzers, oscilloscopes, trace tools, and custom debug instrumentation.
• Collaborate with SoC architects and designers to refine register maps, memory maps, interrupt structures, DMA flows, and debug infrastructure.
• Provide firmware input during design reviews and silicon development milestones.
• Bring up and integrate RTOS or bare‑metal environments.
• Support integration with higher‑level system software or application processors.
• Implement robust error handling, logging, and recovery mechanisms.
• Contribute to manufacturing test firmware, production firmware, and field diagnostics.
• Help ensure long‑term maintainability and scalability of firmware across multiple SoC generations.

• 5+ years of experience in embedded firmware development for SoCs or complex embedded systems.
• Strong proficiency in C/C++ for embedded systems and a solid understanding of low‑level hardware interactions.
• Hands‑on experience with SoC bring‑up or board‑level bring‑up.
• Strong understanding of CPU architectures (ARM, RISC‑V, or similar), memory systems (SRAM, DRAM, DDR, caches), interrupts, DMA, and low‑power states.
• Experience collaborating with ASIC/SoC design or hardware engineering teams.
• Demonstrated ability to debug complex hardware/firmware issues.

• Experience with secure boot, hardware security modules, or cryptographic accelerators.
• Familiarity with pre‑silicon environments such as RTL simulation, emulation, or FPGA prototyping.
• Experience with high‑speed interfaces (PCIe, Ethernet, JESD, Ser Des).
• Background in satellite communication, networking,…