Senior Digital ASIC Design Engineer; m/f/d
Listed on 2026-07-01
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Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer
Location: Grand Cane
Job Title
Requirements Gathering And Elicitation For IP
Architecture Development For CMOS IP Designs
Design And RTL Coding Of Digital And Full-Custom Modules
Verification On Module And Chip Level Including Test Plan/Cases Generation
Documentation Of Implemented Functionality
Support For Floor-Planning And Physical Design
Collaboration With Other Functions
University Degree, Diploma Or BS EE
Background In Digital Design (SOC), Application Specific Integrated Circuit (ASIC) Design Methodologies And Silicon Development Cycle
Experience In Register Transfer Level (RTL) Coding (Verilog)
Experience With Standard Simulation Tools For Digital Designs
Basic Knowledge About UNIX
* Or Linux
* Environment And Using Programming Languages
Technical Communication, Team Work And Problem Solving Skills
English Language Skills
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