Senior Hardware​/Software Design Engineer; HSDE

Job Summary

Leidos seeks a Senior Hardware/Software Design Engineer to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems within our Signals Analysis organization.

• Lead technical design efforts for FPGA‑based DSP components and integrate them with existing Linux code bases.
• Implement DSP algorithms and FPGA RTL, perform timing closure, resource optimization, and build system‑level software integration.
• Document design specifications, test plans, and integration processes.
• Collaborate with a small cross‑functional team to deliver complete subsystem solutions on schedule.

• Bachelor’s degree plus 8 years of relevant experience or equivalent.
• Strong experience in FPGA coding (Vivado) and digital signal processing theory and application.
• Proficiency with Linux OS, C and C++ programming for software‑hardware integration.
• Active TS/SCI clearance with polygraph required.
• Experience with Epiq Solution PDK is desirable.

Competitive compensation and benefits including paid time off, holidays, 401K with a 6% company match, flexible schedules, discounted stock purchase plans, technical upskilling, education and training support, parental paid leave, and more.

$ – $ (general guideline only; compensation determined by multiple factors).

All qualified applicants will receive consideration for employment without regard to sex, race, ethnicity, age, national origin, citizenship, religion, physical or mental disability, medical condition, genetic information, pregnancy, family structure, marital status, ancestry, domestic partner status, sexual orientation, gender identity or expression, veteran or military status, or any other basis prohibited by law. Leidos will also consider for employment qualified applicants with criminal histories consistent with relevant laws.