R&D Engineering, Sr Manager

As a member of the IP Digital Design Methodology team, you will work with global teams to define the best-in-class ASIC design standards and flows from RTL to GDSII for IP development teams. You will be involved with next generation Ser Des and Memory interface controllers, PHYs, and subsystems designed on the latest process technology nodes.

This is an on-site role in Boston or Toronto locations.

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You are a highly experienced ASIC digital implementation technical leader with a deep passion for developing cutting‑edge technology. With over 10 years of hands‑on synthesis and P&R experience coupled with people management, you have honed your skills and are a technical leader in high‑speed digital IP cores and/or SOC’s development. You have a solid understanding of Synthesis, Place & Route, and ASIC design flows.

Your technical expertise is complemented by your leadership ability to influence teams, mentor engineers, foster cross‑functional collaboration, and drive innovation and effective communication across global teams. Your analytical mind and problem‑solving skills enable you to tackle complex challenges and deliver high‑quality results. You are known for your clear and concise documentation, and your familiarity with Synopsys tools and high‑speed interface protocols is a significant advantage.

• Lead digital methodology engineering teams to drive the industry best PPA for IP designs.
• Develop and maintain a complete front‑to‑back end design implementation methodology (RTL to GDSII) using Synopsys’ best in class tools and technologies.
• Evaluate and exercise various aspects of the development flow which may include design for test logic, synthesis, place & route, timing and power (incl. EM/IR) optimization and analysis.
• Develop and maintain best in class digital design methodologies, including documentation, scripts, and training materials.
• Work as a liaison between EDAG tool and IP design teams.
• Continuously improve and refine design processes to enhance efficiency and performance.

• BS or MS in EE with 10+ years of hands‑on experience developing high‑speed digital IP cores and/or SOCs. At least 2-3 years of direct people management experience required for this role.
• Knowledge of IP deliverables, ASIC implementation and physical design flow and tools, memories, logic libraries, and PDK versions.
• Direct hands‑on experience with Fusion Compiler or industry equivalent Synthesis and Place & Route tools.
• Ability to facilitate cross‑functional collaboration, including fostering innovation, improving communication, and driving results.
• Good analysis, debugging, and problem‑solving skills.
• Solid written and verbal communication skills and the ability to create clear and concise documentation and provide trainings.
• Familiarity with other Synopsys tools (Primetime, Prime Power, RLTA, Core Tools) is a plus.
• Working knowledge of high‑speed interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR is a plus.
• This is a on‑site role in Boston or Toronto locations.

• Drive innovation in high‑speed digital IP core and Subsystem development through automation and design methodology.
• Enhance the efficiency and effectiveness of our design and verification processes.
• Contribute to the development of state‑of‑the‑art technology that powers the next generation of intelligent systems.
• Ensure the highest quality standards in the design and implementation of our products.
• Facilitate seamless collaboration across global teams, fostering a culture of innovation and excellence.
• Support the continuous improvement of our design methodologies and tools, staying at the forefront of industry advancements.

You are a collaborative and innovative…