Physical Design Engineer Co-op

Cisco is a global technology leader renowned for its groundbreaking products developed in short time frames. The company is committed to supporting the increasing demands of hybrid work environments and ensuring reliable, high-capacity network connections. This commitment drives its focus on developing cutting-edge products utilizing the latest submicron technologies.

This co-op opportunity offers the chance to work on Cisco’s elite optical communication products, contributing to the development and optimization of ASIC designs. The role involves various tasks focused on physical implementation and optimization, providing comprehensive experience in ASIC design.

• Education: Currently enrolled in a full-time undergraduate program in computer science, electrical engineering, or a related field.
• On-site Presence: Must be able to work on-site in Maynard, MA two days a week.
• Technical Skills:
  • Knowledge of the design cycle from RTL to GDSII.
  • Understanding of Static Timing Analysis, timing closure, and design constraints.
  • Proficiency in block level synthesis, place and route, timing closure, PnR, and signoff tools.

• Interest in VLSI Design: Strong interest in ASIC physical design and verification.
• Deep Submicron CMOS Technologies: Knowledge and experience with deep submicron CMOS technologies.
• Scripting Experience: Experience with scripting languages such as Perl, TCL, Python, or shell.
• Problem-Solving: Analytical and creative problem-solving skills.
• Internship Experience: Previous internship experience in related fields is a plus.

Cisco fosters a diverse and inclusive culture where individuals are encouraged to be themselves while working together as a team. The company emphasizes innovation, creativity, learning from mistakes, and giving back to the community.