Sr. CMP Process Development Engineer

TITLE:

CMP PROCESS DEVELOPMENT ENGINEERFLSA STATUS: EXEMPT

REPORTS TO:

SR. MANAGER, CMP PROCESS DEVELOPMENT

SUMMARY:

Under the direction of the Sr. Manager of CMP Process Development, the CMP Process Development Engineer is responsible for developing and delivering strategies for improving and optimizing wafer CMP and post-CMP cleaning processes and procedures; designing and conducting routine wafer experiments, analyzing the data, and reporting the results; developing and implementing practices or methodologies which reduce cost and improve operational efficiency;

conducting root cause analysis and implementing corrective action; developing and implementing procedures for transitioning new products into the production line; and reviewing, updating, and maintaining documentation and process instructions. This position is located in Milpitas, California.

ESSENTIAL FUNCTIONS:

Develops and delivers strategies for improving and optimizing wafer CMP and post-CMP cleaning processes and procedures

Develops and implements practices or methodologies which reduce cost and improve operational efficiency

Conducts root cause analysis and implements corrective action if required

Develops and implements processes or procedures for transitioning new products into the production line Resolves process or metrology issues related to material selection; recommends corrective action

Reviews, updates, and maintains documentation and process instructions

Instructs operators and technicians on processes and procedures, including modifications to existing procedures

Partners with equipment and maintenance personnel in order to minimize tool down time and integrate new tools into the production line Designs and conducts routine experiments, analyzes data, and develops recommendations for improving the performance or reducing cost based on test results

Partners with other groups and departments, including process and product engineering to develop and implement new processes which reduce scrap and improve yield

Responds to inquiries from other team members, managers, or departments

Adheres to all safety policies and procedures as required

Performs other duties of a similar nature or level

* MINIMUM QUALIFICATIONS:

Master’s degree in Chemical or Electrical Engineering, Materials Science, or Physics, and/or equivalent relevant experience;
PhD degree preferred.

Five years of experience with a Master's degree or two years of experience with a PhD working in the magnetic recording head, hard disk drive, or semiconductor industry in a CMP or process engineering role.

Solid understanding of semiconductor processing, material science, and chemical-mechanical interactions.

Experience with design of experiment techniques (DOE), SPC, defect analysis, and data analysis.

Experience with CMP equipment (e.g., Applied Materials, Ebara), metrology tools, and data analysis software (e.g., JMP, SQL).Knowledge, Skills, and Abilities:

Knowledge of CMP manufacturing processes, practices, and techniques

Knowledge of wafer fabrication processing techniques and tools

Knowledge of various metrology and optical inspection tools and techniques

Knowledge and ability to use Microsoft Office applications to create spreadsheets, Word documents, and presentations

Able to design experiments, analyze results, and recommend corrective action in order to reduce scrap and improve yield

Able to communicate effectively, both verbally and in writing, with all levels of contractors, consultants, employees, and management

Able to work productively and collaboratively with all levels of employees and management

Able to comply with all safety policies and procedures

Demonstrated organizational and time management skills

Demonstrated problem-solving and trouble shooting skills

Flexible and able to prioritize

The annual rate for this full-time position is between $95,000.00-$ + bonus target + benefits. Within the range the individual pay may differ depending on additional factors including job responsibilities, job related knowledge, skills, abilities, education, and experience. The annual pay range shown is subject to change and may be modified periodically.

WORKING CONDITIONS:

The Sr. CMP Process Development Engineer works primarily in an office environment from Monday to Friday. The schedule may be altered from time-to-time to meet business or operational needs; may travel from site-to-site as needed. May also work in a class 100 ESD sensitive wafer fab manufacturing facility; adheres to required safety and dress standards. May be exposed to hazardous chemicals, fumes, or vapors and excessive noise from time-to-time while in the wafer manufacturing facility;

stands and walks; performs various fine grasping movements, bends, and twists; operates a computer and enters information using a keyboard, operates a telephone, and other office equipment. May occasionally be required to push, pull, or lift 10 or more pounds.

Other duties of a similar nature or level are duties that may be required, but may not be…