Sr Staff Engineer Instrument Architecture

We Are The People Who Give Possibilities Purpose

BD is one of the largest global medical technology companies in the world. Advancing the world of health™ is our Purpose, and it's no small feat. It takes the imagination and passion of all of us—from design and engineering to the manufacturing and marketing of our billions of Med Tech products per year—to look at the impossible and find transformative solutions that turn dreams into possibilities.

Job Summary:

The Senior Staff Engineer works closely with Marketing, HW, SW, Reagents and Verification & Validation to lead complex life science products through every stage of the development. Understand customer needs and workflows, systems architecture and analysis, and how the different sub-systems will fit and interact to meet the desired customer function and experience. The Senior Staff Engineer is responsible for the definition and management of requirements, definition of product architecture, guiding characterization of prototype systems, and successful Verification and Validation.

The Senior Staff Engineer takes responsibility of systems definition and its documentation. This includes ultimate responsibility of system requirements and definition of systems architectures, device drivers, interfaces and communication protocols. The Senior Staff Engineer works with the engineering staff to develop and execute experimental protocols followed by the analysis and reporting of results. The Senior Staff Engineer also participates in the integration of systems components.

Additionally, the Senior Staff Engineer supports system level engineering verification efforts and supports the planning of validation test activities. The expectation is to leverage experience as well as best practices, and methods to determine root cause of complex issues. The Sr. Staff engineer is expected to help grow the capabilities of the team through their example setting and mentorship to teammates.

Job Responsibilities:

• Define System Architecture:
  Author comprehensive system-level specifications, interface control documents (ICDs), and functional block diagrams.
• Manage Subsystem Interactions:
  Map and optimize the optical, fluidic, electronic, mechanical, and software interfaces to prevent performance bottlenecks.
• Architect System Control & Real-Time Coordination:
  Architect System Control design, Design state machines, control loops, and timing sequences that orchestrate real-time hardware interactions across fluidic, optical, and electronic modules.
• Design End-to-End Data Flow Architecture:
  Map high-bandwidth data pathways from raw analog detector signals through digitization, FPGA-based processing, firmware buffers, and high speed transport layers up to the software application layer.
• Lead Sub-Systems Budget Allocation:
  Define and manage system-level budgets for optical power, signal-to-noise ratio (SNR), fluidic timing, and electrical power consumption.
• Conduct Performance Modeling:
  Build mathematical models to simulate system throughput, carryover, fluorophore spillover, and sensitivity.
• Drive Trade-off Decisions:
  Balance competing requirements between resolution speed, laser power, mechanical footprint, and manufacturing cost.
• Own the end-to-end requirements lifecycle including user needs, system requirements, derived requirements, traceability, verification planning, and change management for a program.
• Be primary stakeholder in Design and Technical Reviews to practice sound decision making across the program
• Work effectively and collaboratively in a cross functional team and with external partners to identify, communicate, and mitigate program needs at each product lifecycle.

Education, Knowledge and

Experience:

• System Control & Embedded Logic:
  Deep understanding of real-time operating systems (RTOS), deterministic control loops, hardware-software handshakes, state machine design, and communication protocols (e.g., RS232, USB, TCP/IP, CAN bus, SPI, I2C).
• Data Pipeline Architecture:
  Expert knowledge of high-throughput data processing architectures, including DMA (Direct Memory Access) transfers, FIFO buffering strategies, and high-speed bus interfaces (PCIe, USB…