Software Engineer, DPU Networking stack

The application window is expected to close on: 07/31/2026.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

This is a hybrid position located in Milpitas, CA. Ideally 3 days per week in office.

Cisco is building a next-generation DPU-enabled networking platform for secure, high-performance infrastructure and large-scale AI clusters. Our team is responsible for designing the foundational networking, security, and programmable services that span host systems, DPUs, SmartNICs, and cloud-scale control planes. We work at the intersection of systems software, hardware acceleration, distributed security, and AI infrastructure, creating platforms that deliver line‑rate performance, strong isolation, operational reliability, and simplified deployment across modern data center environments.

We are looking for a senior software engineer to develop programmable packet processing pipelines and DPU SDK integrations across modern SmartNIC/DPU platforms, including NVIDIA Blue Field, AMD Pensando, and similar architectures. This role focuses on the lower layers of the DPU networking stack: P4 or P4‑like pipeline development, vendor SDKs, packet classification, policy enforcement, host networking offload, telemetry, and performance validation.

The ideal candidate has strong systems programming skills, deep networking fundamentals, and hands‑on experience building or integrating hardware-accelerated data paths.

• Design and implement DPU-based packet‑processing pipelines for security, host networking, and network services.
• Work with DPU SDKs, P4 or programmable pipeline models, and vendor-specific offload capabilities.
• Build capabilities for firewall policy enforcement, ACLs, packet classification, metering, telemetry, tunneling, routing, NAT, and load‑balancing primitives.
• Develop software across DPU firmware/SDK interfaces, host drivers, Arm‑side services, and user‑space control components.
• Create portable abstractions across heterogeneous DPU and SmartNIC architectures while preserving platform‑specific performance advantages.
• Debug complex issues across host, DPU, SDK, firmware, driver, kernel, and user‑space boundaries.
• Validate throughput, latency, scale, offload correctness, failure behavior, and operational visibility.
• Own well‑scoped features from design through implementation, testing, performance validation, documentation, and rollout.
• Contribute to design reviews, code reviews, threat modeling, production readiness, and mentoring of other engineers.

• Bachelor’s degree with 7+ years of related experience, Master’s with 4+ years, or PhD with 1+ year.
• Proficient systems programming experience in C/C++, Go, Rust, Python, or similar languages.
• Experience building production networking, packet‑processing, security, infrastructure, or systems software.
• Practical knowledge of Linux networking and debugging complex Linux‑based systems.
• Ability to independently own medium-sized technical features from design through delivery.

• Hands‑on experience with DPU, SmartNIC, FPGA, ASIC, NPU, or hardware‑offloaded networking platforms.
• Experience with NVIDIA Blue Field SDKs, AMD Pensando SDKs, P4, programmable packet pipelines, or equivalent data‑plane programming models.
• Familiarity with DPDK, OVS, TC flower, eBPF/XDP, SR‑IOV, VF/PF, kernel bypass, hardware offload, or packet‑processing acceleration.
• Experience with firewall, ACL, segmentation, host networking, tunneling, NAT, VTEP, load balancing, or service chaining.
• Experience profiling and optimizing packet‑processing systems for throughput, latency, scale, and reliability.

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

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