Senior ASIC Design Engineer - Terawave
Listed on 2026-06-03
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Engineering
Systems Engineer
Position Summary
The Senior ASIC Design Engineer leads the design of complex digital IP or subsystems for advanced satellite communication ASICs. This role requires strong technical depth in RTL design, subsystem architecture, and multi‑functional execution to deliver robust, high‑performance silicon for space and ground communication platforms.
Responsibilities- Lead the design and delivery of complex ASIC IP or subsystems from specification through RTL release.
- Define microarchitecture for high‑speed, power‑efficient digital signal‑processing and control logic.
- Drive IP or subsystem trade studies involving throughput, latency, area, power, reliability, and schedule.
- Collaborate with systems, algorithm, and architecture teams to translate communication requirements into hardware implementations.
- Partner with verification, DFT, physical design, and firmware teams to ensure successful integration and tape‑out readiness.
- Review RTL, test plans, and implementation results to maintain high design quality.
- Identify and mitigate technical risks early in the development cycle.
- Mentor junior engineers and help establish standard processes in coding, review, and debug.
- Support post‑silicon bring‑up and root‑cause analysis of lab or field issues.
Minimum Qualifications:
BS or MS in Electrical Engineering, Computer Engineering, or related field. 5–8+ years of ASIC digital design experience. Proven experience owning large blocks or subsystems in ASIC or FPGA development. Strong expertise in System Verilog/Verilog RTL design and debug. Working knowledge of synthesis, STA concepts, CDC/RDC, and integration flows. Experience balancing PPA tradeoffs in production‑quality designs. Demonstrated ability to work across multidisciplinary teams.
Background in space‑based communications, wireless communications, or digital modem architecture. Experience with channelization, beamforming, synchronization, equalization, or coding engines. Familiarity with radiation‑tolerant or high‑reliability design considerations. Experience with formal verification, low‑power methodologies, or emulation/prototyping. Knowledge of high‑speed interface design and data movement architectures.
Compensation RangeCA applicants: $ – $. WA applicants: $ – $. Other site ranges may differ.
BenefitsMedical, dental, vision, basic and supplemental life insurance; paid parental leave; short and long‑term disability; 401(k) with a company match of up to 5%;
Education Support Program. Stock options for all regular employees (working at least 20 hours/week). Paid Time Off:
Up to four weeks per year based on scheduled hours, and up to 14 company‑paid holidays.
Blue Origin is proud to be an Equal Opportunity/Affirmative Action Employer and is committed to attracting, retaining, and developing a highly qualified workforce. Blue Origin hires and promotes people on the basis of their qualifications, performance, and abilities. We support the establishment and maintenance of a workplace that fosters trust, equality, and teamwork. We provide all qualified applicants for employment and employees with equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of their race, color, religion, sex, sexual orientation, gender identity, national origin or ethnicity, age, physical or mental disability, genetic factors, military/veteran status, or any other status or characteristic protected by federal, state, and/or local law.
Blue Origin will consider for employment qualified applicants with criminal histories in a manner consistent with applicable federal, state, and local laws, including the Washington Fair Chance Act, the California Fair Chance Act, the Los Angeles Fair Chance in Hiring Ordinance, and other applicable laws.
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