Lead Defense FPGA Design Engineer DSP Algorithm Implementation

Job Description

Pacific Technical Resources, LLC. IT/Engineering Recruitment Professionals

"Helping to build Great Companies and Great Lives"

We are looking for a talented FPGA (Field Programmable Gate Array) lead design engineer with industry experience in advanced DSP signal processing for a billion-dollar leader in the Defense Industry in San Diego, California.

Move to scenic San Diego. 9/80

Work Schedule:

Every other Friday off. Relocation assistance is available. Work on exciting engineering projects.

• Lead an FPGA design team in the implementation and verification of complex designs in large FPGA devices.
• Simulate, synthesize, and place complex DSP algorithms using tools such as Model Sim, Synplicity, Xilinx Vivado/ISE, and Altera Quartus.
• Implement and support Electronic Support and Electronic Attack signal processing on FPGA devices.

• Bachelor’s Degree and 9 years of prior relevant experience or Graduate Degree and 7 years of related experience or 13 years of related software engineering experience in lieu of a degree.
• Must be a U.S. Citizen and able to obtain a security clearance.
• 9+ years FPGA design experience on Digital Signal Processing designs.
• Experience leading technical employees in complex FPGA design.
• Skilled in VHDL (preferred) or Verilog hardware development languages.
• Preferred:
  Master’s degree in Computer Science, Computer Engineering, Software Engineering, or Electrical Engineering.

Pacific Technical Resources, LLC. specializes in IT/Engineering Recruitment Placement with roots from Honolulu, Hawaii and is headquartered in Phoenix, Arizona.

For qualified candidates willing to work in San Diego, California, please send your resume to Clara at cfoo@

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