SoC Debug – Post-Silicon PnP Validation Engineer

Responsibilities

• Execute comprehensive power and performance (PnP) validation for systems and subsystems.
• Develop and implement innovative design for debug (DFD) tools and automation scripts.
• Conduct thorough root cause analysis to resolve complex triage failures and performance bottlenecks.
• Collaborate effectively with cross-functional teams for SoC debug readiness.
• Formulate comprehensive debug requirements and validation strategies for new product features.
• Design, develop, and execute test methodologies to validate functionalities and power states.
• Utilize advanced scripting and automation techniques for efficient analysis and optimization.

• Bachelor's degree in Electrical/Computer Engineering, Mathematics, or any STEM field with 3+ years of experience.
• Or a Master's in the same field with 6+ months of educational or work experience.
• Experience in SoC debug, validation platforms, or equivalent technical roles.
• Knowledge of scripting languages such as Python for automation and data analysis.
• Understanding of SoC design, architecture, and microarchitecture fundamentals.
• Experience with debugging tools, defect triaging, and system-level root cause analysis.