Principal ASIC Design Engineer

We anticipate the application window for this opening will close on - 27 Mar 2026

At Medtronic, our ASICs save lives. Our designers need to understand the big picture of how their work impacts the end user, a patient. Our integrated ASIC team enables engineers to wear many hats from digital design, verification, the physical flow, to testing in the lab with opportunities to meet doctors and witness implants, directly connecting their work to patients' lives.

Our group is developing Medtronic's next generation of Cardiac Rhythm Management (CRM) products using innovative low‑power SoC methods to improve how our implantable devices provide pacing, defibrillation, and monitoring therapies.

We’re working a minimum of 4 days a week onsite as part of our commitment to fostering a culture of professional growth and cross‑functional collaboration as we work together to engineer the extraordinary.

This position will be based in Mounds View, MN.

Below are the minimum requirements for a principal level position, candidates above or below are encouraged to apply as this role could be reposted to align with a candidate’s experience.

As a member of this Design Team, the Principal ASIC Design Engineer can be involved in all phases of product development, including design definition, verification planning/execution, physical implementation, design for testability, system integration, characterization, and failure analysis under a regulated quality and standard operating procedures. You will be an important part of an experienced product development team whose goal is to deliver the highest quality integrated circuits for use in life‑saving medical devices.

For this role we are particularly looking for ASIC engineers interested in supporting both design and physical flow activities with strengths in scripting or DSP development. This strengthens the team’s ability to adapt to shifting project needs and timelines.

• Create System Verilog RTL designs from product specification to defining architecture, and block level implementation.
• ASIC physical design implementation: synthesis, Static Timing Analysis (STA), Place and Route (PAR), UPF/CPF Interaction with Place and Route, drive best implementation for floor planning, clock tree design, timing closure, and low power.
• Support verification for coverage improvement and design debug.
• Interact and influence product engineering, test engineering, research and firmware teams as part of the product development process.
• Determine design approaches and parameters.
• Analyze ICs using lab equipment to verify functionality and operating range, conduct experimental tests and evaluate results.

• Bachelor's degree required.
• Minimum of 7 years of ASIC design experience.
• Or Master's degree with minimum 5 years of ASIC design experience.
• Or Ph.D. with 3 years of ASIC design experience.

• Medical device experience preferred.
• Master’s degree in Electrical Engineering or Computer Engineering.
• Strong scripting skills (Python, Tcl, Perl).
• Universal Verification Methodologies (UVM).
• Cadence CAD tools:
  Genus, Conformal, Innovus, Voltus, Tempus, Modus.
• Lab automation methods.
• Low‑power design methods and power analysis.
• Digital Signal Processing (DSP).
• Experience developing mixed‑signal ICs with Digital Analog Boundary (DAB) crossings, A2D, D2A.
• Passion for automating processes and tool flows; including the use of agentic AI.
• Good communication skills (written and verbal) and ability to work and contribute in a team‑based matrix environment.
• Professional/academic/hands‑on exposure for digital and analog IC designs.
• Ability to demonstrate innovation in defining and solving problems.
• Ability to work in a team environment.
• Good organizational, reporting and presentation skills.
• Hands‑on experience with lab equipment: CPU debuggers, oscilloscope, power supplies, DMM, etc.

For Baccalaureate degrees earned outside of the United States, a degree that satisfies the requirements of 8 C.F.R. § 214.2(h)(4)(iii)(A) is required.

The above statements are intended to describe the general nature and level of work being…