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Computer Architect

Job in Mountain View, Santa Clara County, California, 94039, USA
Listing for: Acceler8 Talent
Full Time position
Listed on 2026-08-01
Job specializations:
  • Design & Architecture
Salary/Wage Range or Industry Benchmark: 180000 - 240000 USD Yearly USD 180000.00 240000.00 YEAR
Job Description & How to Apply Below

Acceler8 Talent is partnered with an extremely well funded startup whose hardware promises to drastically change compute for the world's most advanced models.

With over $600m raised, and a world-class team with a track record of shipping highly successful products, this start-up abandons legacy chip design assumptions and strives for the best possible solution for every aspect of their chip - there is no such thing as "good enough".

As a Computer Architect, you will define the architecture next-generation compute engines, working at the intersection of research, software, and hardware. You will understand ML/AI workloads deeply and translate requirements into architectural specifications, guiding the design from concept through first silicon and bring-up.

What You’ll Do Here

  • Define ISA for compute cores, memory subsystems, and interconnects
  • Derive architectural requirements directly from ML/AI use cases and emerging model trends
  • Author detailed architectural specifications and structured interface definitions
  • Specify numeric formats and quantization strategies optimized for AI workloads
  • Estimate area, timing, and power to inform architectural tradeoffs
  • Collaborate closely with Research, Software, RTL, and Physical Design teams to ensure cohesive execution
  • Participate in architecture reviews, design reviews, and test planning
  • Support first-silicon bring-up and post-silicon debug

Who You Are

  • Strong background in computer architecture with deep understanding of modern compute systems
  • 3+ years experience translating workloads/algorithms into hardware architectures
  • Proven ability to evaluate hardware cost, area, timing, and power tradeoffs
  • Excellent fundamentals in latency, throughput, and scalability theory
  • Knowledge of numeric formats, quantization techniques, and precision tradeoffs for ML workloads
  • Experience with programming and performance/code optimization
  • Ability to define structured interfaces and bit-level encodings using constructs such as structs and tagged unions
  • Strong verbal and written communication skills, with the ability to clearly document and defend architectural decisions
  • Comfortable working cross-functionally in a fast-paced, execution-driven environment

Bonus Points If You Have

  • Familiarity with parallel execution models such as VLIW, SIMD, or vector architectures
  • Experience designing custom ML silicon or AI systems
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