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Principal Engineer, NPU ASIC Design Verification

Job in Mountain View, Santa Clara County, California, 94039, USA
Listing for: Cariad, Inc.
Full Time, Contract position
Listed on 2026-03-04
Job specializations:
  • Engineering
    Systems Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 108 - 115 USD Hourly USD 108.00 115.00 HOUR
Job Description & How to Apply Below
Position: Contract - Principal Engineer, NPU ASIC Design Verification
Contract to Hire:
Principal Engineer, NPU ASIC Design Verification


Mountain View, CA

Hybrid

We are CARIAD, an automotive software development team with the Volkswagen Group. Our mission is to make the automotive experience safer, more sustainable, more comfortable, more digital, and more fun. To achieve that we are building the leading tech stack for the automotive industry and creating a unified software platform for over 10 million new vehicles per year. We're looking for talented, digital minds like you to help us create code that moves the world.

Together with you, we'll build outstanding digital experiences and products for all Volkswagen Group brands that will transform mobility. Join us as we shape the future of the car and everyone around it.

Role Summary:

The Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards.

This role is responsible for driving the verification excellence of CARIAD's state-of-the-art Neural Processing Unit (NPU), including the development of comprehensive test benches and validation methodologies that ensure the NPU meets the highest standards of functional correctness and performance. In addition, the role is responsible for spearheading the development of verification infrastructure, including the creation of scalable regression frameworks and coverage-driven methodologies to deliver a high-quality, safety-critical NPU that meets automotive industry requirements.

Role Responsibilities:
Verification Planning & Strategy
  • Develop comprehensive verification plans and test plans for NPU functional blocks and system-level integration
  • Define verification milestones, coverage goals, and success criteria aligned with project requirements
  • Create verification strategies for AI-specific workloads including convolution engines, matrix multiply units, and activation functions
Testbench Development & Implementation
  • Design and implement System Verilog/UVM test benches for complex NPU verification
  • Develop constrained random test generators for neural network inference pipelines
  • Create reference models and checkers for AI workload validation
  • Build verification environments for memory subsystems, DMA controllers, and system interconnects
  • Implement functional and code coverage collection and analysis methodologies
System Integration & Performance Verification
  • Verify AXI4/AHB protocol compliance and system-level interfaces
  • Validate timing, throughput, and power consumption requirements
  • Develop and maintain regression test suites for continuous integration
  • Collaborate with software teams on hardware-software co-verification
  • Support FPGA prototyping and emulation platforms for system validation
  • Ensure compliance with automotive safety standards (ISO 26262) and functional safety requirements
General Skills:
  • Expert communicator across global, cross-cultural, and cross-functional teams.
  • Strong analytical, debugging, and system-level problem-solving skills.
  • Proven ability to lead complex technical initiatives without direct authority.
  • Quality-driven mindset with a strong focus on correctness, robustness, and coverage.
  • Collaborative approach across hardware, software, verification, and safety organizations.
Required Specialized Skills:
  • Expert System Verilog and UVM-based verification
  • Coverage-driven, constrained-random, and formal verification
  • Verification of AI accelerators, NPUs, and complex digital subsystems
  • AXI4/AHB protocol and memory subsystem verification
  • Verification automation using Python/Perl
  • FPGA prototyping and emulation-based validation
Desired Skills:
  • Automotive functional safety (ISO 26262)
  • Power-aware and low-power verification techniques
  • GenAI-assisted verification workflows
Workplace Flexibility:
  • Occasional travel may be required, less than 5%
Years of Relevant Experience:
  • 12+ years applying advanced verification and hardware engineering expertise on complex digital systems, including AI accelerators and safety-critical designs.
Required Education:

Bachelor's degree in Electrical Engineering or Computer Engineering.

Desired Education:

Master's degree in Electrical Engineering or Computer Engineering.

Workplace Flexibility:
  • This is a contract W2 position
  • Compensation: $108.00 - $115.00/hr
  • This role is based in Mountain View, CA. Must be local, no relocation.
  • Immediate availability is required. The selected candidate is expected to start promptly upon offer acceptance and pending successful completion of a standard background check and drug screening
  • Applicants must be currently authorized to work in the United States on a full-time basis. We are unable to provide visa sponsorship now or in the future
  • We do not accept C2C (Corp-to-Corp), 1099, or third-party agency submissions for this position
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