Signal and Power Integrity Engineer

Staff Signal and Power Integrity Engineer

_corporate_fare_ Google _place_ Mountain View, CA, USA

** Advanced*
* Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

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* Minimum qualifications:

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* + Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

+ 6 years of experience working in signal and power integrity engineering.

+ 3 years of experience in technical leadership.

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* Preferred qualifications:

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* + PhD in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

+ 10 years of experience in high-speed hardware design and SIPI analysis for consumer electronics.

+ Experience in leading signal and power integrity sign-off for complex SoCs and mobile platforms.

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Experience with advanced EM simulation tools (Cadence Sigrity, HFSS, ADS) and laboratory measurement equipment for correlation studies.

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Experience with scripting (Python) to drive simulation automation and methodology improvements.

** About the job*
* Our team serves as the center of excellence for Signal and Power Integrity (SIPI) within the Pixel hardware organization. We drive technical innovation and sign-off methodologies for pixel platform design, supporting multiple concurrent product generations (Pixel 27, 28, and beyond). We own the end-to-end SIPI process, from initial architecture and stackup definition to complex PDN modeling and HSIO validation. By leveraging cutting-edge automation and academic research collaborations, we solve critical hardware challenges to ensure the performance and robustness of Google's flagship devices.

As a Staff Signal and Power Integrity Engineer team, you will lead the design and validation of signal and power integrity for our flagship mobile devices. You will define technical sign-off methodologies, drive simulation automation, and collaborate with engineers to push the boundaries of hardware performance and reliability.

The US base salary range for this full-time position is $189,000-$274,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google () .

** Responsibilities*
* + Lead SIPI design, simulation, and validation for next-generation Pixel platforms.

+ Develop and optimize automated simulation flows for Power Delivery Networks (PDN), power trees, and high-speed signal integrity.

+ Perform board-level SIPI feasibility studies, including stackup definition and decoupling capacitor strategies.

+ Execute lab measurements and correlation studies to calibrate simulation models with real-world hardware performance.

+ Collaborate cross-functionally with Architecture, Silicon, and Product Design teams to resolve complex electrical design trade-offs.

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