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Power Design Engineer
Job in
Mountain View, Santa Clara County, California, 94043, USA
Listed on 2026-06-02
Listing for:
Apolis
Full Time
position Listed on 2026-06-02
Job specializations:
-
Engineering
Electrical Engineering
Job Description & How to Apply Below
- Job Title:
Power Design Engineer - Location:
Sunnyvale, CA or Austin T - Tax Term (W2, C2C):
- Job Type (Permanent/Contract) :
Contract - Duration: 6+ months
- Pay Range:
We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power profiling and automation. The ideal candidate will play a crucial role in the analysis of power consumption, identifying hardware events that correlate with power consumption. Candidates will build run-time power models using Machine Learning techniques.
Role and Responsibilities:
RTL Design and Verification:
Run power tests on RTL designs and verify that the test behavior matches the intent.
Power Profiling:
Utilize tools such as PPRTL or PTPX to perform comprehensive power profiling of hardware designs, identifying power-intensive areas and opportunities for optimization. Correlate various hardware events/telemetry with power profiles to understand power consumption.
Data Processing and Automation:
Develop and implement basic Python and/or TCL scripts for automation, data extraction, and processing of large volumes of hardware design data.
Analysis and Reporting:
Analyze profiling data, generate reports, and present findings to the design team, offering insights and recommendations for power reduction.
Collaboration:
Work closely with architects and designers to understand the power profile of the IP block and build a runtime power model using ML techniques.
Required Skills:
Strong background in RTL design and verification principles.
Demonstrable experience with power profiling tools such as PPRTL or PTPX.
Proficiency in scripting languages like Python and/or TCL for automation and data manipulation.
Ability to process and analyze large datasets related to hardware design.
Preferred Qualifications:
Familiarity with machine learning models and their application in hardware design optimization is a plus.
Qualifications:
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