Senior Research Scientist, Superconducting Digital Electronics, Quantum AI

Senior Research Scientist, Superconducting Digital Electronics, Quantum AI

Cambridge, MA, USA;
Mountain View, CA, USA; +4 more

Benefits for this role include:

• Health, dental, vision, life, disability insurance
• Retirement Benefits: 401(k) with company match
• Paid Time Off: 20 days of vacation per year, accruing at a rate of 6.15 hours per pay period for the first five years of employment
• Sick Time: 40 hours/year (increased to 69 hours/year for Seattle) including 5 discretionary sick days per instance
• Maternity Leave (Short-Term Disability + Baby Bonding): 28-30 weeks
• Baby Bonding Leave: 18 weeks
• Holidays: 13 paid days per year

• Master's degree in Electrical Engineering, Physics, related engineering discipline, or equivalent practical experience.
• Experience in superconductor logic families (e.g., RSFQ, ERSFQ, RQL, HFQ, AQFP).
• Experience performing tape‑out of a superconducting IC chip.
• One or more published research paper or presentation at a relevant scientific conference.

• PhD in physics, electrical engineering, or a related engineering discipline.
• 7 years of research/industry experience in the design and simulation of superconductor digital logic circuits with 3 years of experience leading an Research and Development (R&D) group towards tape‑out and demonstration of superconducting IC chips.
• Experience with full digital design flow including RTL, synthesis, verification, timing closure, place-and‑route, and post‑fabrication validation.
• Experience with low‑temperature measurements of superconductor digital logic circuits.
• Experience with superconducting qubits.
• Proficiency with computer‑aided design tools and electromagnetic simulation tools.

As a Research Scientist, your primary focus will be designing and simulating superconductor digital logic circuits (such as single flux quantum (SFQ) logic and adiabatic quantum flux parametron (AQFP) logic) for qubit control and readout. You will engage in co‑design loops with qubit designers and superconducting digital circuit designers, utilizing advanced IC design tools, numerical circuit simulation techniques and 3D electromagnetic modeling to optimize signal integrity, minimize crosstalk, manage thermal budgets, and aim performance metrics required for coherent control of qubits.

You will also interface with fabrication engineers to help define and establish IC design standards that are compatible for both the sensitive superconducting qubits and the co‑located cryogenic control electronics. This work is critical to building a fully integrated, modular chip stack that combines superconducting qubits with their control electronics directly within the cryogenic environment, accelerating the path toward large‑scale, error‑corrected quantum computers.

The US base salary range for this full‑time position is $174,000-$252,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law.

See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at…