Hardware Systems Engineer, Watches

Position: Staff Hardware Systems Engineer, Watches
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Minimum qualifications:

* Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

* 6 years of experience working in a consumer electronics technical environment.

* 3 years of experience in technical leadership.

Preferred qualifications:

* 10 years of consumer electronics experience, specializing in HDI design, FPC, and rigid-flex assemblies.

* Experience in advanced packaging (SiP, PoP, CoW) to drive system miniaturization.

* Experience in lifecycle management from concept and NTI through EVT/DVT to mass production.

* Experience in adjacent disciplines like RF, thermal, and mechanical engineering.

* Ability to navigate ambiguity, evaluate complex data, and make sound technical risk assessments.

* Exceptional communication skills, distilling complex technical trade-offs into actionable insights for cross-functional peers and leadership.

About the job

The Pixel Watch Electrical Engineering (EE) team is responsible for the end-to-end hardware development of Google's first-party (1P) Watch products. We work with product managers during initial concept and design phases, guide new technology investigations, and manage the entire hardware lifecycle-from board integration and comprehensive validation to overseeing manufacturing to deliver products with an advanced user experience and health sensing capabilities.

We are seeking a highly skilled and visionary Electrical Engineer to lead the hardware integration and electrical architecture for our next-generation hardware.

In this role, you will be the technical anchor for form factor integration, strategizing how to partition silicon into compact enclosures while maximizing power efficiency and thermal performance.

You will operate at the intersection of electrical, mechanical, and systems engineering, pushing the boundaries of what is physically possible. You will be solving multi-dimensional hardware puzzles, driving architectural convergence across teams, and turning New Technology Introductions (NTIs) into mass-produced reality.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $188000 - $275000 (USD) + 20% bonus target + bonus + equity + benefits

Learn more about benefits at Google.

Responsibilities

* Drive end-to-end electrical architecture for space-constrained devices, leveraging advanced packaging technologies like System in Package (SIP) and rigid-flex to maximize density and minimize Z-height.

* Act as the technical linchpin, collaborating with mechanical, Radio Frequency (RF), sensors, and display teams to resolve physical layout collisions and foster architectural convergence.

* Lead data-driven trade-offs balancing size, performance, cost, and thermals to keep development moving while optimizing SoC integration for power and thermal efficiency.

* Guide New Technology Introductions (NTI) to integrate novel, market-differentiating hardware components into the final product design.

* Ensure design for manufacturability (DFM) by overseeing rapid prototyping and validation of early-stage systems, ensuring compact architectures can be reliably scaled for mass production.