Micro-Architect and RTL Designer

Overview

MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full‑stack solutions from silicon to systems, including hardware and software, to train and run the largest machine‑learning workloads for AGI. The role is for silicon micro‑architects and design engineers who will create best‑in‑class silicon for high‑performance and sustainable GenAI. Successful candidates will deliver performant and functionally accurate silicon for MatX products across compute, memory management, high‑speed connectivity, and other key technologies.

• Contribute to MatX’s silicon architecture‑to‑design methodology with a scalable solution across blocks, subsystems, and full‑chip design.
• Own entire subsystem or subsets and/or chip‑level silicon design deliverables from micro‑architecture to sign‑off ready design.
• Plan and drive intermediate and sign‑off reviews on micro‑architecture and design specifications, execution progress, area and timing closure toward various silicon milestones including design freeze and tape‑out.
• Work closely with the verification, DFT, and physical design co‑owners of the subsystem/block in question and deliver best‑in‑class performance‑power‑area results.

• Concept‑to‑silicon experience driving silicon design for subsystems and/or top‑level functions with ASICs and SOCs from an architecture specification to production silicon.
• 4+ years of experience with System Verilog, Python, C/C++ and similar scripting and programming languages for chip design and related flows.
• Production‑proven experience on silicon micro‑architecture and design concepts used in high‑performance compute (CPUs, GPUs, accelerators), high‑speed connectivity, memory management and related functionalities.
• Experience testing designs and working closely with verification teams toward performance and coverage closure goals.
• Hands‑on experience with design synthesis, design lint, and related flows to take designs to high‑quality sign‑off.
• Familiarity with verification, emulation platforms and methodologies is a plus.
• Experience with high‑speed I/O IP is a plus.
• Experience with logic that focuses on moving, storing, or managing data such as caches, buffers, crossbars, etc. is a plus.
• This is a hybrid role that requires working from our Mountain View, CA office 3 days a week (Tuesday through Thursday).

• Early Career: $120,000 – $275,000 + equity.
• Mid Career: $175,000 – $450,000 + equity.
• Senior Career: $275,000 – $600,000 + equity.

• A stake in our success: a cash/equity mix that fits your needs and an option to do early exercise.
• Health & wellness:
  Company‑subsidized Health, Dental, Vision, and Life insurance; pre‑tax Health Savings Accounts with generous company contribution.
• Time to recharge: 4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year.
• Support to parents:
  Up to 12 weeks of paid parental leave, regardless of your path to parenthood.
• Learning & development: $1,500 yearly toward your professional development (e.g. conferences, courses, and other learning opportunities).
• Team connection:
  Team lunches, quarterly off‑sites, and regular town halls.
• Financial wellbeing: 401(k) and/or Roth IRA with 5% company contribution.
• Flexible spending accounts:
  Pre‑tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses.
• Commute on us:
  For those commuting up to 1 hour, the company covers rideshare cost and reimbursements to reclaim drive‑time.
• MatX extras: $50 per month to use on the perks you care about most.
• Remote perks:
  Working remotely Monday & Friday with support for home‑tech setup and remote Wi‑Fi expense reimbursement.

MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other…