Senior Design Verification Engineer, Multimedia/AI/ML, Silicon
Listed on 2026-07-09
-
Engineering
Test Engineer, Hardware Engineer
Google Mountain View, CA, USA
Requirements- Bachelor's degree in electrical engineering or computer science, or equivalent practical experience.
- 8 years of experience with verification methodologies and languages (e.g., UVM and System Verilog).
- Experience with interconnect protocols (e.g., AXI, APB, ACE).
- Experience developing and maintaining verification test benches, test cases, and test environments.
- Master's degree or PhD in electrical engineering or computer science.
- Experience with low power, debug, GLS, formal verification.
- Experience in scripting languages (e.g., Python) for automation and analysis.
- Experienced in ARM or CPU based subsystem verification.
- Experience in cross-functional and global collaboration, fostering relationships and sharing insights to achieve company objectives.
- Experience leading design verification of IPs or subsystems delivered to many SoCs.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful.
Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
US: $163,000 - $237,000 (USD) + 15% bonus target + equity + benefits. Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
Responsibilities- Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process.
- Plan the verification of multimedia design blocks at subsystem level by understanding the design specification, and interacting with architecture and design engineers to identify important verification scenarios.
- Work with architecture, software, design, and back-end implementation stakeholders to make technical decisions.
- Create and enhance constrained-random verification environments using system verilog and UVM. Identify and implement improvements to the verification methodologies.
- Identify verification gaps and demonstrate advancement towards tape-out through comprehensive coverage metrics. Debug tests with design engineers to deliver functionally correct design blocks.
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.
See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).