Silicon Design Verification Engineer, Devices and Services

Silicon Design Verification Engineer

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you will develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward.

If you get excited about building new things and working across disciplines, then our team might be your next career step.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $138000 - $198000 (USD) + 15% bonus target + equity + benefits.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience creating and using verification components and environments in standard verification methodology.
• Experience verifying digital logic at RTL level using System Verilog or C/C++.
• Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in low-power design verification.
• Experience in ARM and RISC-V processor based DV including tool chains and C based testing.
• Expertise in different verification techniques and methodologies including formal, GLS, UPF based Power simulations, UVM and C based testing, to achieve bug-free Silicon in complex SoCs.
• Familiarity with scripting languages and software development frameworks.

• Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design verification leads and design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using System Verilog and UVM or formally verify designs with SVA and industry leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.