Senior Physical Design Engineer: PnR, PPA & Timing Closure
Job in
Mountain View, Santa Clara County, California, 94039, USA
Listed on 2026-07-26
Listing for:
Wipro
Full Time
position Listed on 2026-07-26
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
Wipro is seeking a Physical Design Engineer to drive block-level design from netlist to GDSII with strong PnR, PPA optimization, and timing convergence. Expect hands-on CTS, routing, EMIR, and STA methodologies, collaborating with RTL/DFT teams to ensure successful tapeouts.
Qualifications include BS/MS in EEE, experience across 7nm/5nm nodes, and proficiency with Fusion Compiler/ICC2, Prime Time, and Innovus. Competitive compensation and full benefits offered.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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