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Senior RTL Architect AI Accelerator; Equity Eligible
Job in
Mountain View, Santa Clara County, California, 94039, USA
Listed on 2026-07-27
Listing for:
DensityAI
Full Time
position Listed on 2026-07-27
Job specializations:
-
Engineering
Hardware Engineer, Test Engineer, Systems Engineer
Job Description & How to Apply Below
DensityAI is seeking a seasoned RTL design engineer to own the design of digital blocks for our AI accelerator. You will oversee microarchitecture, System Verilog implementation, and integration, translating architectural specs into synthesizable RTL that meets PPA targets.
You will collaborate with DV, PD, and DFT teams across the RTL2
GDS flow to tape out silicon, while leveraging Python/Tcl for automation and tackling advanced interconnects and memory subsystems.
Position Requirements
10+ Years
work experience
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