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Senior CPU RTL Design Engineer — Cache & Microarchitecture
Job in
Mountain View, Santa Clara County, California, 94039, USA
Listed on 2026-09-09
Listing for:
Google
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Hardware Engineer, Systems Engineer, Test Engineer
Job Description & How to Apply Below
Google in Mountain View, CA, USA seeks a Senior CPU RTL Design Engineer to advance CPU cache subsystems with RTL focus. You will collaborate across performance, architecture, and software teams to evaluate trade-offs and optimize microarchitectures for future CPUs.
Requires a Bachelor's in a related field and 8 years' experience with System Verilog, Lint, UPF, and CPU cache designs. Google offers a strong compensation package and equity as part of total rewards.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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