Hardware Design Engineer, Speed Networking

Hardware Design Engineer, High Speed Networking

Full-time

Working closely with cross‑functional teams including software, product management, marketing, and manufacturing, our engineers innovate new system architectures and develop high‑speed PCBs requiring state‑of‑the‑art signal integrity and power integrity design practices.

Our Hardware Design Engineering team is at the forefront of developing high‑speed networking and Ethernet products used in enterprise campuses, hyperscale data centers and bleeding‑edge AI clusters. The team is responsible for the end‑to‑end design and development of advanced hardware solutions that meet the demands of modern networking environments.

• Authoring functional specifications of high power and high density Ethernet switches used in AI networks
• Selecting and qualifying components
• Schematic capture and tool‑based design verification
• Working closely with eCAD teams on PCB layout and component footprints
• Running signal integrity simulations on both power and datapath signals
• Collaborating with mechanical and thermal engineers on the system general arrangement and physical realization
• Specifying PCB stack‑up and fabrication details with various PCB vendors
• Developing or customizing programmable logic devices for control and timing planes
• Co‑ordinating with local and overseas contract manufacturers (CM) from prototype through production
• Lab bring‑up and debug of prototypes
• Collaborating with diagnostics software engineers on design validation and manufacturing test development
• Driving complex system debug between software, hardware, and test teams
• Training CM for high‑yield test and manufacturing

• BSEE or MSEE
• 2+ years of relevant experience in hardware engineering (new graduates also considered)
• Solid understanding of basic electronics theory and design
• Experience with circuit design and debug, especially involving high‑speed signals
• Experience with lab debug and test equipment
• Experience learning complex design tools
• Familiarity with signal integrity and power integrity concepts
• FPGA design and system simulation experience is a plus
• Some Python or other coding experience is a plus

Arista Networks is an equal opportunity employer. Arista makes all hiring and employment‑related decisions in a non‑discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.