Quantum Hardware Circuit Designer

Overview

IBM Research is seeking talented engineers to join the quantum hardware design/simulation team at the IBM Thomas J. Watson Research Center in Yorktown Heights, NY. The team focuses on delivering quantum processor and processor-adjacent designs to meet a variety of internal needs, and develops and drives the methodology to make these designs successful. Design scopes span from exploratory research to production-roadmap quantum processor unit development.

IBM Research is seeking talented engineers to join the quantum hardware design/simulation team at the IBM Thomas J. Watson Research Center in Yorktown Heights, NY. The team focuses on delivering quantum processor and processor-adjacent designs to meet a variety of internal needs, and develops and drives the methodology to make these designs successful.

The successful candidate will join the core quantum processor unit (QPU) design team, contributing directly both to processor designs (consisting of networks of interconnected/coupled qubits with the full infrastructure for control/readout) and testsite designs in support of innovation breakthroughs for QPU technologies. Applicants with prior experience in e.g. CMOS RFIC design but not in superconducting electronics are very welcome. The role includes deep involvement at all levels of design tapeouts using both custom and automated design tools, including block-level and chip-level layout.

Applicants are expected to have experience with relevant hardware development tools such as Cadence Virtuoso/Spectre, Synopsys Custom Compiler/Prime Sim, Keysight ADS, Ansys Electronics Desktop, etc. Familiarity with IC fabrication tools, quantum device design and/or quantum computing engineering is preferred but not required. Because the role includes collaboration between several diverse and dynamic teams of technical and operations personnel, good communication skills, initiative, and a strong sense of responsibility are key.

Responsibilities Include

• Participation in design releases for QPUs and related testsites
• Connectivity/schematic capture for quantum hardware releases
• Detailed mask layout and chip finishing for quantum hardware releases
• EM simulation and model development for quantum hardware components and full designs

• Either RF/microwave/IC design tooling such as:
• Cadence Virtuoso/Innovus
• Synopsys Custom Compiler/Fusion Compiler/IC Compiler II/Design Compiler
• Keysight Path Wave ADS
• Or PCB design (Cadence Allegro, Siemens Xpedition, Altium Designer etc.)
• Tapeout experience in deep submicron CMOS, III-V, or superconducting technologies, or PCB design experience for RF applications

• Microwave engineering
• Electromagnetic simulation
• Quantum computing hardware
• Experience with CMOS EDA tooling