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Senior ASIC Design Engineer: VHDL​/Verilog & FPGA Prototyping

Job in Forest Home, Tompkins County, New York, USA
Listing for: Arcfield
Full Time position
Listed on 2026-07-09
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 101326 - 243486 USD Yearly USD 101326.00 243486.00 YEAR
Job Description & How to Apply Below
Location: Forest Home

Arcfield is seeking an ASIC Design Engineer based in Forest Home, New York, who will be responsible for complex problem-solving and developing designs for chips. The role includes debugging VHDL/Verilog and performing verification on HDL simulators.

The ideal candidate will hold a degree in Electrical Engineering and have significant experience in VHDL targeting Xilinx FPGAs, as well as experience with Cadence Virtuoso and HDL simulators. A competitive compensation range is offered, reflecting the candidate's experience and skills.

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Position Requirements
10+ Years work experience
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