Sr. Failure Analysis Engineer
Listed on 2026-08-05
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Engineering
Systems Engineer, Test Engineer, Electronics Engineer
Sr. Failure Analysis Engineer
At Penguin Solutions, we understand the boundless potential of technology and support our customers in turning cutting-edge ideas into outcomes—faster, and at any scale. With over two decades of experience as trusted advisors, Penguin Solutions is an end-to-end technology company solving the industry's most complex challenges in computing, memory, and LED solutions. Penguin designs, builds, deploys, and manages high-performance, high-availability enterprise solutions, allowing customers to achieve their breakthrough innovations.
We are seeking a seasoned and highly skilled Senior DRAM Failure Analysis Engineer with extensive expertise in high-speed, high-capacity DRAM modules. The ideal candidate will have 5+ years of experience in DRAM module reliability testing, high-speed signal integrity analysis, and failure analysis to ensure optimal performance in mission-critical environments. This leadership role involves owning and advancing our burn-in methodologies, spearheading high-speed testing strategies, and driving system-level failure analysis to guarantee the reliability of DDR4/DDR5 based memory solutions.
You will work closely with cross-functional teams to define and enhance product performance, quality, and reliability, while also mentoring junior engineers.
Responsibilities- Lead and conduct complex failure analysis (FA) on DRAM modules and memory subsystems, utilizing high-speed signal integrity tools and oscilloscopes.
- Drive the determination of failure root causes at the chip, module, and system level, presenting findings to technical and leadership teams.
- Architect and execute debug strategies for system-level failures by analyzing memory controller interactions, BIOS tuning, and DIMM register settings in server and cloud environments.
- Investigate and resolve critical performance bottlenecks, intermittent failures, and memory errors caused by power integrity (PI), signal integrity (SI), and thermal stress.
- Lead the development and implementation of advanced stress test strategies for high-performance DRAM modules.
- Mentor junior engineers in best practices for high-frequency waveform analysis, signal integrity debugging, and root cause analysis.
- Generate and present detailed reports (8D) summarizing failure analysis findings, root causes, and strategic recommendations for product and process improvements.
- Act as a technical lead in cross-functional teams to enhance product design, quality, and manufacturability.
- Bachelor's degree in Electrical Engineering or a related field;
Master's degree is a plus. - 5+ years of experience in DRAM module burn-in, stress testing, and failure analysis.
- Expert-level understanding of high-speed memory interfaces (DDR4, DDR5, HBM) and advanced SI/PI concepts.
- Proven track record of complex problem-solving and root cause failure analysis in a high-performance computing environment.
- Demonstrated mastery of server memory modules and system-level debugging in Linux and Windows environments.
- Expertise with high-frequency test equipment such as oscilloscopes.
- Strong proficiency in applying modern generative AI tools and Agentic frameworks to real-world business problems.
- Advanced proficiency in data analysis and scripting (e.g., Python, Perl, or similar).
- Deep knowledge of JEDEC reliability standards, ECC error handling, and memory RAS (Reliability, Availability, and Serviceability) features.
- Extensive experience with BIOS tuning, memory controller optimizations, and DRAM memory training algorithms.
- Excellent communication skills with the ability to explain complex technical concepts effectively to both technical and non-technical audiences.
- Strong interpersonal and leadership skills for mentoring and driving cross-functional team interaction.
This opportunity is in Newark, California. Willingness to travel occasionally to customer sites and industry events as needed.
The base pay range that the Company reasonably expects to pay for this position in California is $145,000 - $165,000; the pay ultimately offered may vary based on business considerations, including job-related knowledge, skills, experience, and education. The position is bonus-eligible, and there are medical, dental, and vision benefits available. There is a 401k saving plan and other benefits, such as Paid Time Off, Life Insurance, and an Employee Assistance Plan.
We are committed to creating an inclusive environment that embraces differences and fosters belonging for all. Equal Opportunity Statement:
We are an Affirmative Action/Equal Opportunity Employer and strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, national origin, race, ethnicity, creed, gender, disability, veteran status, or any other characteristic protected by law.
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