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Senior FPGA Verification Engineer; SystemVerilog/UVM
Job in
North Reading, Middlesex County, Massachusetts, 01864, USA
Listed on 2026-04-17
Listing for:
Teradyne
Full Time
position Listed on 2026-04-17
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
A leading technology company is seeking a Digital Logic Verification Engineer at their North Reading, MA development center. The ideal candidate has over 3 years of experience in digital logic verification, with strong skills in System Verilog and UVM. Responsibilities include reviewing design requirements, developing testbench architecture, and collaborating with logic designers. The position offers a competitive salary between $98,700 and $157,900, along with robust health and well-being benefits.
This role is not eligible for visa sponsorship.
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Position Requirements
10+ Years
work experience
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