Senior SI​/PI Engineer North Reading, MA

Location: North Reading, MA, US

We are seeking a highly skilled and experienced Senior Signal Integrity/Power Integrity Engineer to join our team. In this role, you will leverage your expertise in high-speed electronics interfaces to perform pre-routing and post-routing simulations for cutting‑edge designs. The ideal candidate will have in-depth knowledge of signal and power integrity principles, experience simulating cables and connectors, and PCBs, as well as a strong understanding of high-speed protocols such as PCIe, USB, and others.

You will be responsible for documenting SI/PI performance, including clearly and concisely presenting simulation results in both written and oral formats to a variety of stakeholders, including design teams and leadership.

• Perform pre- and post-routing signal integrity (SI) and power integrity (PI) end‑to‑end (cables, connectors, traces) simulations for various critical technologies in the design (from UARTs to PCI express).
• Provide input to PCB stack-ups to ensure optimal performance, reliability and cost.
• Collaborate with hardware design teams to implement changes based on simulation.
• Perform lab-based correlation activities on physical hardware to connect simulations to implementation and improve quality of simulation.
• Identify and resolve SI/PI issues such as crosstalk, reflections, impedance mismatches, and power delivery noise.
• Understand and be able to compute the impact of signal integrity upon digital timing margins.
• Provide expertise in high-speed protocols, including PCIe, USB, Ethernet, and others, to ensure compliance with standards.
• Design and optimize power delivery networks (PDN) to meet system-level requirements.
• Clearly present complex simulation results and recommendations in written reports, presentations, and technical meetings.
• Stay informed on industry trends and emerging technologies in SI/PI engineering, PCB materials and high-speed interfaces.

• 7+ years of experience in signal integrity and power integrity engineering, with a focus on high-speed electronics.
• Bachelor’s or Master’s degree in Electrical Engineering or a related field.
• Expertise in simulations for high-speed PCBs and systems using tools such as HFSS, 3D Layout, CST, Ansys SIwave, Cadence Sigrity, Polar, or similar.
• Experience with PCB layout tools such as Allegro, Altium Designer, or Mentor Graphics.
• Strong understanding of high-speed protocols such as PCIe Gen5/Gen6, USB 3.x/4.0, and others.
• Deep knowledge of SI/PI concepts, including impedance control, S-parameters, crosstalk, reflections, eye diagrams, jitter, and PDN analysis.
• Proven ability to interpret and apply simulation results to inform design and debug issues.
• Knowledge of electromagnetic compatibility (EMC) and its impact on SI/PI.
• Experience working across cross-functional teams and mentoring junior engineers.
• Strong verbal and written communication skills, with the ability to convey technical findings to diverse audiences.
• Experience working in a fast-paced environment and delivering within tight turn‑around times.
• Desire to work as a team with a results‑driven approach.

The base salary range for this role is $111,300–$178,200. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

This job is eligible for discretionary bonus(es) based on financial performance.

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.

We are an equal‑opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment.

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