Hardware Verification Engineer
Job in
North Reading, Middlesex County, Massachusetts, 01864, USA
Listed on 2026-06-02
Listing for:
Artech LLC
Full Time
position Listed on 2026-06-02
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Job Title:
Hardware Verification Engineer
Location:
North Reading, MA (100% Onsite)
Duration: 12 Months contract
Payrate: $80 to $95 per hour on W2.
Responsibilities
- Design advanced test methodologies to validate new products for functional completeness, performance, and system level robustness.
- Develop, debug, and deploy automated test code in an object oriented environment, ensuring scalability, reliability, and long term maintainability.
- Lead cross functional investigations by using functional and performance test results to identify, isolate, and resolve complex integration, interoperability, and performance issues across hardware, firmware, and software teams.
- Own the deployment of validation tests from early product development through factory release, ensuring smooth handoff, documentation, and support for manufacturing teams.
- Provide technical leadership and mentorship , influencing test strategy, reviewing test plans, and elevating engineering best practices across the organization.
- 8+ years of experience in hardware verification or product test engineering, with a strong focus on high-speed digital products and complex system level validation.
- Advanced proficiency in object-oriented programming , with experience in C# (preferred), Java, or C++ for automation, and test framework development.
- Expert in lab-based troubleshooting and root cause analysis , capable of driving cross functional teams through complex hardware, firmware, software systems.
- Highly proficient with high-speed test equipment , including high-speed oscilloscopes, BERTs, and related instrumentation; experience with Teradyne ATE is a plus.
- Extensive experience validating high speed digital communication standards , such as PCIe Gen4 and above, including eye diagram evaluation.
- Strong command of signal integrity analysis techniques , including jitter decomposition, loss characterization, equalization, and PAM4 based measurements.
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