Semiconductor Design Engineer [, N. Reading, MA]

Semiconductor Design Engineer

The Teradyne Compute Test Division Engineering team is looking for a highly-motivated, energetic, technically driven Digital Design Engineer to focus on the development of test instrumentation. Development occurs in a dynamic and challenging multi-site development environment. We are seeking a Senior Semiconductor Design Engineer. In this role, you will architect and implement cutting-edge digital and mixed-signal designs that enable precise, high-speed test capabilities for complex semiconductor devices.

Your work will directly support innovations in advanced compute architectures, chiplet-based systems, and high-density interfaces, helping to ensure exceptional performance, accuracy, and reliability across Teradyne's industry-leading test platforms. This is a highly impactful opportunity to drive the design of future semiconductor test technologies and shape the evolution of next-generation computing components.

Responsibilities:

• Architecture, design, implementation, verification, and lab validation of test instruments/systems.
• Work with Hardware, Software and Systems engineering to define scalable, high-performance, high-quality, extensible, and maintainable.
• Hands-on execution of product integration and verification testing and debug.
• Work closely with the design verification team to simulate your designs and ensure appropriate test coverage is achieved.
• Define and perform prototyping and characterization experiments.
• Act as technical lead for FPGA project teams, directing/mentoring junior engineers.
• Participate in logic design process improvement initiatives and tool evaluations.

All

About You:

We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.

Skills/Technical Focus:

• Technical Focus:
  Digital logic design and FPGA physical design (Floor-planning, P&R, STA).
• Technologies:
  Xilinx and/or Intel FPGAs. Standard cell ASIC design experience is a plus.
• PCIe, AXI, DDRx, SERDES, USB, I2C, SPI, 10/100GE, PLL, HBM, DLL, ADC, DAC, MIPI, Display Port, PRBS.
• Languages:
  
  Expertise in Verilog and a scripting language (Python, TCL, PERL…) required. Familiarity with System Verilog, UVM, VHDL, C, C++ preferred.
• Operating Systems:
  Windows, Linux
• Development Tools:
  Cadence(Xcellium), Synopsys(Spyglass CDC/LINT), Xilinx(Vivado), Intel(Quartus), revision control tools(Clearcase, GIT, SVN), bug tracking tools(JIRA or other), continuous integration development methodologies and tools.
• Understanding of design for high-speed signal integrity.
• Excellent troubleshooting, debugging, and problem solving skills.
• Solid verbal, written and presentation skills.
• Experience working in cross-functional teams designing complex systems
• Commitment to excellence, efficiency, and product quality

Education/

Experience:

• BS required, advanced degree preferred in electrical engineering or related field from a top university or engineering institution
• Minimum of 10 years of practical hardware development experience

This position is not eligible for visa sponsorship.

Compensation:
The base salary range for this role is $140,500 - $224,800. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Incentive Plan:
This job is eligible for discretionary bonus(es) based on financial performance.

Benefits:
Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.