Senior Principal Analog Design Engineer

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Experience Level: Professional

Job Type: Regular

Location:

Olympia, WA, US, 98502 San Jose, CA, US, 95134 Richardson, TX, US, 75081

Requisition

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense.  to learn how our innovative team is helping connect, protect and power our planet.

Qorvo’s fast-growing Power Management division is at the forefront of innovation in Power Loss Protection, PMICs, Motor Control, and Battery Management solutions, serving a diverse range of applications across Mobile, Consumer, IoT, and Industrial markets. We are seeking a highly skilled Analog Power Design Engineer to develop next-generation, high-performance power management solutions. In this role, you will drive architecture, design, and validation of industry-leading analog power ICs, collaborating closely with cross-functional global teams to deliver world-class products that set new benchmarks in efficiency, reliability, and performance.

The peference is for this to be a hybrid position where the expectation is to be onsite multiple days a week at either our Richardson TX or San Jose CA office. However, we are open to candidates being remote in WA.

Responsibilities:

• Lead the design and development of high-performance analog power management ICs, ensuring best-in-class efficiency, power density, and reliability.
• Collaborate with system engineers to define product architecture and specifications, balancing performance, power, and cost requirements.
• Select and implement optimal circuit topologies, ensuring robustness, yield, and manufacturability.
• Conduct transistor-level design, simulation, and validation to meet functional and performance specifications.
• Work closely with layout engineers to optimize floor planning, parasitic, and overall silicon performance.
• Engage with global design teams, including colleagues in Asia, to align on development strategies and execution plans.
• Partner with test and characterization engineers to define validation methodologies, troubleshoot design issues, and optimize production test strategies.
• Drive technical reviews and documentation, presenting design decisions, analysis, and trade‑offs to internal stakeholders.

Required Qualifications:

• A minimum of a Bachelor’s degree in Electrical Engineering
• 15+ years of engineering experience (or an equivalent amount of education and expereince) working in the semiconductor industry
• 8+ years of experience in analog and mixed-signal Integrated circuit (IC) design, with DC-DC power converter architectures and control methodologies such as voltage mode control and current mode control
• Ability to communicate highly technical concepts effectively to both technical and non-technical stakeholders
• Experience working in Electronic Design Automation (EDA) tools such as EMIR tools capacitive coupling tools and flows, parasitic extraction tools, floating nodes, etc.
• Experience with production release of power management ICs

Preferred Qualifications:

• Masters or PHD in Electrical Engineering
• Experience with Cadence Virtuoso, Simplis, and ADS
• Hands‑on lab experience supporting high frequency switching power supplies in the semiconductor power management industry

Competitive base salary commensurate with experience: $193,100 - $251,100, relevant for the…