Sr. ASIC Design Engineer, Leo

Job  | Amazon Kuiper Manufacturing Enterprises LLC

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low‑latency, high‑speed broadband connectivity to unserved and underserved communities around the world.

Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities: Lead RTL design and development of large subsystems and custom blocks. Integrate IP cores by choosing configuration and connectivity options to fit system requirements. Assimilate IP collateral to become the team’s expert. Own the design as cognizant designer for integration with software. Partner with verification team to ensure complete test plans and functional coverage. Support the design through all phases: RTL/Gate simulations, emulation and post‑silicon implementations.

In this role you will:

• Work closely with the system architects to develop world‑class SOC and IP blocks that meet power, area and performance targets.
• Lead the definition, configuration and integration of SoC Subsystems.
• Configure and integrate 3rd‑party IP blocks, develop support logic.
• Contribute to the SoC floor planning effort.
• Understand low‑power design & the impact of DFT on the blocks.
• Perform initial synthesis, timing analysis, CDC analysis and other back‑end interface flows.
• Assist verification team in unit verification including test plan development.
• Assist with debug and bring‑up.

A day in the life: Be part of Amazon LEO’s sub‑team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high‑speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

• 8+ years of ASIC implementation, synthesis, STA and physical design in deep sub‑micron nodes (16nm or smaller).
• 8+ years of digital design in communication systems.
• 8+ years of wireless communications systems and implementation experience.
• Bachelor’s degree in Electrical Engineering or a related field.
• Knowledge of implementing chips with multiple power islands and power gating.
• Knowledge of serial protocols including SPI, I2C, I3C, and UART.
• Experience with low‑power design techniques.

• Master’s degree or Ph.D. in Electrical Engineering or related field.
• Experience with modern ASIC/FPGA design and verification tools.
• Experience with SOC bring‑up and post‑silicon validation.

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Salary Range: USA, CA, San Diego –  –  USD annually
USA, TX, Austin –  –  USD annually