Layout Principal Designer

2401 E 86th St, Bloomington, MN 55425, USA

Posted Monday, May 18, 2026 at 5:00 AM

Bold Thinking. World Changing. At Sky Water, our ingenuity helps improve lives around the world by manufacturing U.S. made semiconductors that are essential ingredients of modern life. Automotive safety enhancements, life-saving medical devices, consumer electronics and American security require semiconductors. Working in our Minnesota headquarters, Florida, or Texas location — employees join together to improve the world.

Explore what’s possible. Joining our U.S.

- based team means contributing to and learning about the commercialization of some of the most exciting technologies the world has ever seen. We are turning “science fiction” into everyday reality through technologies such as superconducting, 3D integrated circuits or computer chips, carbon nanotubes, photonic logic devices, micro electro-mechanical systems and other emerging device topologies. We manufacture products for aerospace and defense, medical, automotive, consumer and industrial markets, to name a few.

Our customers include emerging leaders who rely on our intellectual property security and quality manufacturing services.

Step into the future. Sky Water’s values of Integrity, Excellence, Collaboration, Empowerment and Growth Mindset guide us to cultivate an empowered, learning environment. We also invest in developing highly skilled, dedicated employees — and employees who are entering the workforce for the first time, from the military, and a variety of educational backgrounds.

Are you bold thinking? Find your place on our team and help us change the world!

This Sky WaterLayout Principal Designerwill primarily lead custom layout and Electronic Design Automation (EDA) activities to provide testchip collateral for semiconductor integrated circuit (IC) technologies. This engineer will be a significant contributor to a broad array of design projects supporting modeling, reliability, and yield as part of Process Design Kit (PDK) development for advanced CMOS or quantum technologies.

The position is based at our HQ site in Bloomington, MN, with consideration available for remote work.

• Layout of new structures for eTest, modeling, reliability, yield, and IP testchips as part of new technology development
• Version control and management of large design libraries with multiple contributors
• Introduction of both custom and automated designs for both new & derivative layout projects supporting highly diverse technology flows
• Utilize Sky Water PDK’s and provide feedback to internal teams on issues, improvements, capabilities, etc.
• Lead physical verification and tape-in reviews

• Expert in custom layout design using IC EDA tool-assisted design flow such as Cadence and Siemens EDA tool suites, (e.g. Calibre and Virtuoso)
• Familiarity with layout automation using SKILL, Tcl, python or other scripting languages.
• Knowledge and experience in developing and/or using physical verification tools (DRC, ERC, LVS/PEX) and DFM tooling.
• Experience in IP project and/or library management.
• Familiarity with typical mixed-signal IC design.
• Clear communicator, concise written report skills, and inventive problem solver
• U.S. Person
  
  Required:
  
  This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons.
• ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee.
• 7 - 10 years of experience with AS in Electronic Design fields. 5-7 years of experience with BS in Electrical Engineering, Microelectronics or related fields.

• Background in PDK development in some or all of the following fields: CMOS, MEMS, photonics, and superconducting.
• Familiarity with parasitic extraction tools such as Mentor Calibre xRC, Cadence Quantus, or Synopsys StarRC.
• Experience in project management of IC design (architecture to GDS) & fabrication (tape-out to post-silicon validation and testing).
• Experience with chemical-mechanical polishing (CMP) shape density filling techniques.
• Experience with data preparation and/or OPC…