Digital Design Engineer

This job is with Encode Inc, a fully owned subsidiary of Lance Soft.

Pay Rate will be between $120 - $126/h on W2

Enter Job Description...

Plans, performs, and executes engineering research and design development for both new products and existing products. Performs design/HDL analysis, including high speed and low power designs. Participates in simulation, verification, and integration tasks. Takes algorithmic or functional specifications and coverts that to a design that can be implemented for use in a lab or field environment. Develops models, simulate and verify designs, fabricate prototypes, and test hardware solutions.

Creates and maintains accurate and detailed design files. Candidate should possess experience in electrical engineering and a track record of demonstrating designs on hardware. Digital HDL design experience is required, including complex, high-speed HDL based implementations of algorithms targeting programmable logic devices (PLDs, FPGA, ASIC,etc), microprocessors, DSP and/or ARM processors. Hands-on experience with code design, simulation and testing is required.
Enable Skills-Based Hiring No
Qualification Assessment
Must Have
Degree Level
Bachelor's Degree
Yes
Design
Experience creating and maintaining accurate and detailed design files
7 years

Experience with complex, high-speed HDL based implementations of algorithms
7 years
Performing basic design calculations
7 years
Product Design
7 years
Hardware

Experience with Xilinx Versal
4 years
Hardware Design
7 years
Programming
FPGA Development (VHDL/Verilog or System Verilog)
7 years
VHDL / Verilog
7 years
Software
VHDL/Verilog/System Verilog Firmware Development (Modelsim)
7 years
Software Tools
Xilinx FPGA (RFSoC & Ultrascale)
7 years
Xilinx Vivado
7 years
Systems
Experience working in a UNIX based environment with familiarity of UNIX based scripting
7 years
Nice to Have
Degree Level
Masters Degree
Yes
Programming
MATLAB
0 years
Perl, TCL, or Python
0 years
Background/Need
The Tactical Networks Group specializes in advanced network and communications systems development, with a focus on tactical mobile, military airborne networks of the future. The Tactical Networks Group uses a combination of technical analysis, modeling, simulation, emulation, prototype development, and flight evaluation to develop new communication systems and evaluate and predict their performance under expected conditions.
Virtual/Work from Home
Onsite
Other information relevant to the job requirement?
A digital design engineer is needed to develop VHDL for use in a free-space optical communication system.

Requirements:
-Greater than 7 years of experience with team based VHDL development processes for FPGA based designs is required, including VHDL code development, simulation, verification, synthesis, high-speed timing closure and hardware-based acceleration.
-Must have excellent verbal and written communication skills
-In-depth knowledge of Xilinx Ultrascale+ and Versal FPGAs.
-Must be able to function proficiently in an exclusively UNIX based environment.
-In depth familiarity of UNIX based scripting, Xilinx Vivado, Modelsim/Questa, laboratory test equipment, network test equipment, and source/revision control tools.
-Experience developing implementation architectures from requirements documents or high-level specifications.
-Experience using and maintaining legacy IP and UNIX build environments. Requires the ability to troubleshoot designs operating within an integrated system.

Preferred

Skills:

- Experience with DDR4 memory, terrestrial network standards, DSP processing techniques, and design and debug of complex circuit boards
-Knowledge of Matlab, Perl, TCL, System C, System Verilog

-Candidate should expect to be onsite a minimum of 4 days/week.
-Interim clearance is sufficient to start.
-Initial interview via zoom, second round interviews will be IN PERSON. They will entertain a relocation candidate and a second round zoom, but local candidates should plan to interview in person.
Level of Effort
Full-Time Basis
Will this position materially impact the conduct or direction of a research program(s)?
No
What level of clearance is required?
Secret