Principal PLL IC Design Engineer - TeraWave

## Principal PLL IC Design Engineer - Tera Wave Apply locations :
Greater Seattle Area:
Bay Area, CA:
San Diego, CAtime type:
Full time posted on:
Posted Yesterday job requisition :
R63391

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!  Blue Origin is pioneering the future of space-based communications with Tera Wave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth.

This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

We are seeking a Principal IC Design Engineer to lead the development of integrated Phase-Locked Loops (PLLs) and clocking systems in advanced CMOS/SiGe processes. This role requires extensive design experience, particularly at mmWave frequencies, and is essential for advancing our technology offerings in space communication systems. You will be responsible for delivering state-of-the-art performance while contributing to innovative solutions that drive Blue Origin's mission of enabling millions to live and work in space for the benefit of Earth.
** Special Mentions:** - Relocation provided
- Travel expected up to 10% of the time
- Interviews will include a technical assessment
- This role will be based onsite in either the San Diego, CA;
Bay Area, CA; or Renton, WA. A temporary remote work exception is approved while our Bay Area and San Diego sites are being developed.
** Responsibilities include but are not limited to:
*** Leading the design, development and integration of PLLs and clock distribution in advanced CMOS FinFET and SiGe technologies, focusing on performance optimization and trade-off analysis.
* Utilizing full proficiency in Spectre and AMS flows to develop high-performance PLL circuits.
* Collaborating with RF and SOC system architects to define requirements for PLLs and their sub-blocks based on system specifications, ensuring seamless integration into RF payloads and terminals.
* Overseeing layout, top-level integration, floor planning, and verification of the overall design for successful tape-out cycle.
* Working closely with validation and product engineers to develop test plans, facilitate bring-up, optimize performance, and ensure reliable & high-yield production cycles.
* Investigating and implementing fundamental analog building blocks to enhance overall circuit performance
* Mentoring junior engineers for best design practices in analog domain.
*
* Minimum Qualifications:

*** Advanced degree (MS/PhD) in Electrical Engineering or related field.
* 10+ years of experience in the design and development of high-speed (20GHz) PLLs, and LO generation for high-performance applications at RF and mmWave frequencies.
* Proven expertise in loop design for phase noise/jitter, spur profile, area, and power optimization.
* Proficient in the design of PLLs and clock distribution circuits for wireless and wireline applications.
* Experience with clock domain synchronization techniques within systems involving multiple PLLs and/or clock domains.
* Fundamental understanding of device physics for process selection and performance optimization.
* Full proficiency in mixed-mode and RF modeling, simulation, and verification methodologies using toolsets such as MATLAB, Spectre, System Verilog, and AMS.
* Extensive experience in PLL silicon characterization and debugging.
* Proficiency in the design of fundamental analog/RF building blocks, including amplifiers, filters, mixers, harmonic-rejection mixers, pre-scalers, and frequency multipliers.
* Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted…