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Principal Electrical Engineer FPGA​/ASIC; Remote

Remote / Online - Candidates ideally in
North Little Rock, Pulaski County, Arkansas, 72114, USA
Listing for: Prattwhitney
Remote/Work from Home position
Listed on 2026-07-07
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 120000 USD Yearly USD 90000.00 120000.00 YEAR
Job Description & How to Apply Below
Position: Principal Electrical Engineer FPGA/ASIC (Remote)

Position Overview

Electrical or Computer Engineer with extensive experience in ASIC, FPGA, and SoPC design, verification, and integration for Collins Avionics solutions. This remote role focuses on high‑performance digital design across displays, computing, and networking products.

Responsibilities
  • Capture, decompose, and trace requirements.
  • Develop digital architecture and RTL design in VHDL, Verilog, or System Verilog.
  • Create UVM constrained‑random environments and test benches.
  • Write placement and timing constraints; perform synthesis, place and route, and static timing analysis.
  • Conduct verification using simulation, inspection, analysis, and test methods.
  • Generate DO‑254 DAL‑A certification artifacts for airborne electronic hardware.
  • Participate in peer reviews, FAA SOI audits, and provide engineering bids for RFIs and RFPs.
  • Communicate with engineering, program management, internal leadership, and customers.
  • Lead or mentor engineers; recommend tools and practices for continuous improvement.
Qualifications – Must Have
  • STEM degree with a minimum of 8 years relevant experience or an advanced degree.
  • Proficient in RTL and testbench development using VHDL, Verilog, or System Verilog.
  • Strong Linux/Unix skills with scripting (C/C++, Python, Perl).
  • Experience with FPGA tools (Questa Sim, Vivado, Libero, Synplify Pro).
  • Familiarity with data interfaces such as PCIe, DDR, I2C, Ethernet, CDN, ARINC‑429.
  • Knowledge of device‑level timing and clock‑domain crossing.
  • Ability to work independently and as part of a globally distributed team.
Qualifications – Preferred
  • Experience with UVM constrained‑random methodology.
  • DO‑254 design assurance experience for ASIC, FPGA, or SoPC.
  • Knowledge of video and networking concepts and architectures.
  • Proficiency in chip‑level verification techniques (functional coverage, code coverage, LEC).
  • Track record of managing cost, schedule, and performance objectives.
  • Risk management experience (identification, quantification, mitigation).
Benefits
  • Medical, dental, and vision insurance.
  • Paid vacation (three weeks for new hires).
  • 401(k) plan with employer match and retirement contribution.
  • Tuition reimbursement and student loan repayment.
  • Life and disability coverage with optional additional coverages.
  • Parental leave, adoption assistance, and fertility benefits.
  • Employee assistance program and wellness resources.
  • Optional pet, home, and auto insurance; group legal and  protection.
EEO Statement

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, or veteran status. RTX provides affirmative action for qualified individuals with a disability and protected veterans in compliance with relevant federal laws.

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