Analog Mixed-Signal IC Design Engineer - TeraWave
Seattle, King County, Washington, 98127, USA
Listed on 2026-07-13
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Engineering
Electronics Engineer, Systems Engineer, Test Engineer
Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based communications with Tera Wave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.
We are seeking candidates with extensive hands‑on experience in analog/mixed‑signal IC design to participate and/or lead the development of high‑speed data converters (ADCs/DACs), filters, amplifiers, ESD protection, and biasing and power management systems in advanced CMOS/SiGe processes. You will be responsible for delivering state‑of‑the‑art performance circuits while contributing to innovative solutions that drive Blue Origin's mission of enabling millions to live and work in space for the benefit of Earth.
SpecialMentions
- Relocation provided
- Travel expected up to 10% of the time
- Interviews will include a technical assessment
- This role will be based onsite in San Diego (preferred), CA;
Bay Area, CA; or Renton, WA. A temporary remote work exception is approved while our Bay Area and San Diego sites are being developed.
- Lead the design, development and integration of advanced analog/mixed‑signal functions in advanced CMOS and SiGe technologies, focusing on performance optimization and trade‑off analysis.
- Utilize full proficiency in Spectre and AMS flows to develop high‑performance mixed‑signal circuits and systems.
- Collaborate with system architects to define block‑level performance and interface requirements based on system specifications, ensuring seamless integration into RF payloads and terminals.
- Oversee layout, top‑level integration, floor planning, and verification of the overall design for successful tape‑out cycle.
- Work closely with validation and product engineers to develop test plans, facilitate bring‑up, optimize performance, and ensure reliable & high‑yield production cycles.
- Investigate and implement fundamental analog building blocks to enhance overall circuit performance and mentor junior engineers for best design practices in analog domain.
- Bachelor's degree in Electrical Engineering, or related technical discipline
- Proven experience in the design and development of high‑performance analog/mixed‑signal integrated circuits and systems. (5+ years
- Level III, 7+ Years
- Level IV (Senior), 10+ Years
- Level 5 (Principal)) - Expertise in the design of data converters (ADCs and DACs).
- Proficiency in mixed‑mode and analog/RF modeling, simulation, and verification methodologies using toolsets such as MATLAB, Spectre, System Verilog, and AMS.
- Deep understanding of Electromigration and layout‑dependent effects on circuit performance, namely in advanced FinFET technologies.
- Extensive experience in silicon characterization and debugging.
- Experience with fundamental analog/RF building blocks, including amplifiers, filters, oscillators, reference generation and LDOs.
- Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
- Advanced degree (MS/PhD) in Electrical Engineering related technical discipline
- Familiarity with RF design concepts and metrics such as noise figure, intercept points, line‑up analysis, etc.
- Fundamental understanding of device physics for process selection and performance optimization.
- Familiarity with chip‑level ESD protection design and verification.
- Familiarity with digital design, digital verification, and System Verilog modeling.
- Strong communication skills
Base Pay Range for: CA applicants…
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