Verification Engineer

We are looking for a talented Design Verification Engineer to join our VLSI team.

• Plan & implement UVM verification environments developing tests, test benches, UVM components, and regressions/test lists
• Responsible for generating and executing the Verification Test Plan and Verification Requirement Matrix
• Interact with Architecture, Design, SW and Validation teams
• Define new DV methodologies and improve existing ones
• Work on both ASIC and FPGA Space system projects

• 7+ years of relevant design verification experience
• Proficiency in FPGA/ASIC Verification development methodology
• Proficiency in System Verilog and UVM
• Knowledge and experience with FPGA tools (Vivado/Quartus/VCS)

• Experience validating RF Comms, DSP Algorithms, and High Speed SERDES
• Experience validating designs for Space Applications
• Competitive salary and benefits package.
• Benefits ce include medical, dental, vision, PTO, holidays, FSAs, 401(k) match, short term and long-term disability, and parental leave.
• Flexible hybrid working model with opportunities for remote work. The office is located in the Denver Tech Center.
• Collaborative and innovative work environment. Opportunities for professional growth and development.
• Be part of a pioneering team in the satellite communication industry.

The salary range for this position is $130,000 to $200,000
. Ramon.

Space will consider relevant work experience, skills, education, and training when putting together an offer for this position.

This role involves access to export-controlled technology. Eligibility for such access is subject to U.S. export control laws, and the company may need to obtain appropriate government authorization before granting access.

Ramon.

Space is committed to equal employment opportunities.

188 Inverness Drive West suite 225, Englewood, CO 80112, USA