Senior​/Principal Electronics Engineer - Digital IC Design, Onsite

Search for job title, job req , military title, keywords

Search for City, State, Country, Zip Code

Sandia National Laboratories is the nation’s premier science and engineering lab for national security and technology innovation, with teams of specialists focused on cutting‑edge work in a broad array of areas. Some of the main reasons we love our jobs:

Challenging work with amazing impact that contributes to security, peace, and freedom worldwide

Extraordinary co‑workers

Some of the best tools, equipment, and research facilities in the world

Career advancement and enrichment opportunities

Flexible work arrangements for many positions include 9/80 (work 80 hours every two weeks, with every other Friday off) and 4/10 (work 4 ten‑hour days each week) compressed workweeks, part‑time work, and telecommuting (a mix of onsite work and working from home)

Generous vacation, strong medical and other benefits, competitive 401k, learning opportunities, relocation assistance and amenities aimed at creating a solid work/life balance*

World‑changing technologies. Life‑changing careers. Learn more about Sandia at: http://(Use the "Apply for this Job" box below)..gov

* These benefits vary by job classification.

What Your Job Will Be Like:

We are seeking a highly motivated experienced Digital IC Design Engineer to join a collaborative team delivering advanced ASIC solutions for mission and laboratory customers. This role focuses on translating system needs into robust, verifiable RTL through tapeout, with close coordination across analog/MEMS/photonics and physical‑design partners.

On any given day, you may be called on to:

Review project schedules and milestones (tapeout targets, design reviews, lab deliverables) with the PI/tech lead, identify blockers (PDK/tool updates, interface questions, verification gaps), and drive closure

Convert customer/mission needs into clear block‑level specifications (performance, power, area, radiation tolerance, interfaces, testability) and maintain requirements‑to‑design traceability

Develop and maintain RTL (control, datapath/DSP, interfaces), integrate IP, and implement clean CDC/reset strategies and appropriate low‑power/clocking techniques.

Build and extend verification environments; run regressions; analyze failures; close coverage; and perform lint, CDC, and formal checks with documented evidence for reviews

Run or coordinate synthesis and implementation handoff; review timing/power reports; debug critical paths; and iterate with physical design to meet constraints

Collaborate closely with analog/MEMS/photonics teams on mixed‑signal interfaces (ADC/DAC timing, bias/control, sensor protocols) and validate behavior against system‑level models

Apply knowledge of advanced integration constraints (I/O, routing, packaging, thermal, signal integrity; 2.5D/3D integration) to architecture and implementation tradeoffs

Incorporate resiliency features as required (TMR/EDAC, scrubbing, watchdogs, redundancy) and support radiation/reliability analysis and trade studies

Define scan/BIST strategy, test hooks and observability for lab bring‑up, and support post‑silicon debug planning and test‑vector development

Maintain design documentation (ICDs, review packages) and present at peer reviews; capture decisions and action items for configuration control

Contribute to R&D efforts in advanced signal/data processing (e.g., focal‑plane arrays, radiation detector readouts, neuromorphic concepts, quantum support circuits) through simulation and small test chips

Follow configuration management, data handling, and tool/PDK usage practices, coordinating with foundry/MPW schedules and internal processes as applicable

Due to the nature of the work, the selected applicant must be able to work onsite.

Salary Range:

$117,500 - $235,700

* Salary range is estimated, and actual salary will be determined after consideration of the selected candidate's experience and qualifications, and application of any approved geographic salary differential.

Qualifications We Require:

A Bachelor's degree in a relevant discipline plus a minimum of five years of directly related experience, or an equivalent combination of directly relevant education and engineering or scientific…