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Postdoctoral Appointee, Advanced CMOS Product and Design - Onsite

Remote / Online - Candidates ideally in
Albuquerque, Bernalillo County, New Mexico, 87101, USA
Listing for: Sandia National Laboratories
Part Time, Remote/Work from Home position
Listed on 2026-09-12
Job specializations:
  • Engineering
    Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 120000 USD Yearly USD 90000.00 120000.00 YEAR
Job Description & How to Apply Below

Job

698945

Location

Albuquerque, NM

Full/Part Time

Full-Time

Regular/Temporary

Temporary

About Sandia

Sandia National Laboratories is the nation's premier science and engineering lab for national security and technology innovation, with teams of specialists focused on cutting-edge work in a broad array of areas. Some of the main reasons we love our jobs:

  • Challenging work with amazing impact that contributes to security, peace, and freedom worldwide
  • Extraordinary co-workers
  • Some of the best tools, equipment, and research facilities in the world
  • Career advancement and enrichment opportunities
  • Flexible work arrangements for many positions include 9/80 (work 80 hours every two weeks, with every other Friday off) and 4/10 (work 4 ten-hour days each week) compressed workweeks, part-time work, and telecommuting (a mix of onsite work and working from home)
  • Generous vacation, strong medical and other benefits, competitive 401k, learning opportunities, relocation assistance and amenities aimed at creating a solid work/life balance*

World-changing technologies. Life-changing careers. Learn more about Sandia at: http://www.sandia.gov

* These benefits vary by job classification.

What Your Job Will Be Like

The Advanced CMOS Product and Design group is seeking a Postdoctoral Appointee to advance radiation-hardened analog and mixed-signal integrated circuit (IC) design in state-of-the-art foundry process technologies, with an emphasis on Intel 18A/18A-P class (Intel 18AP) nodes and other advanced platforms. The successful candidate will contribute to the end-to-end development of RHBD circuits from architecture and transistor-level design through physical implementation and verification while collaborating closely with experts in radiation effects, device physics, modeling, packaging, test, and system applications.

This role focuses on enabling next-generation, radiation-tolerant microelectronics for national security missions by developing circuit techniques and design methodologies that maintain performance in the presence of TID, SEE (SET/SEU/SEL), and variability, and by maturing these designs toward silicon demonstration. In this position, you will have opportunities to lead technical contributions, publish results, and engage with external partners as appropriate.

  • Develop radiation-hardened-by-design analog/mixed-signal circuits (e.g., front ends, references/biasing, regulators, clocks/PLLs, data converters, sensor interfaces, or other mission-relevant macros) in advanced CMOS technologies.
  • Perform transistor-level design, simulation, and optimization using industry-standard EDA tools (SPICE-class simulation, mixed-signal verification, and signoff-quality flows).
  • Implement layouts and/or oversee physical design activities, including layout-aware design, DRC/LVS, parasitic extraction, EM/IR, and reliability signoff consistent with advanced-node constraints.
  • Apply and evaluate RHBD techniques against TID and SEE susceptibility, including upset mitigation strategies, SET-tolerant analog design practices, and robustness to process/voltage/temperature corners.
  • Work with radiation-effects subject matter experts to define test structures, radiation characterization plans, and interpretation of radiation test data to improve circuit designs and design rules.
  • Collaborate with multi-disciplinary teams on PDK enablement, model validation, design kits, and methodology development to support RHBD design in Intel 18AP-class nodes.
  • Support prototype bring-up, debug, and characterization, including bench measurements and correlation to simulation (directly or through close partnership with test engineers).
  • Communicate results through technical reports, publications, program reviews, and conference presentations, and contribute to proposal and roadmap activities as needed.
  • Collaborate in a multi-disciplinary environment.

Due to the nature of the work, the selected applicant must be able to work onsite.

Qualifications We Require
  • PhD in Electrical Engineering. PhD needs to be conferred within the last 5 years.
  • Demonstrated expertise in analog or mixed-signal IC design (coursework and/or tapeout experience).
  • Experience with circuit simulation and analysis, and familiarity with IC physical design fundamentals.
  • Ability to obtain and maintain a DOE Q level security clearance.
Qualifications We Desire
  • Prior work in radiation effects, RHBD, reliability‑aware design, or resilient microelectronics.
  • Tapeout experience in advanced nodes (FinFET/GAA helpful) and familiarity with signoff…
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